CD4012BM96G4 ,CMOS Dual 4-Input NAND Gate 14-SOIC -55 to 125logic diagrams for CD4023B.DYNAMIC
CD4013B ,CMOS Dual D-Type Flip FlopMaximum Ratings.. 410.2 Layout Example....... 126.2 ESD Ratings........ 411 Device and Documentatio ..
CD4013BC ,Dual D-Type Flip-FlopElectrical Characteristics” provide con-Small Outline 500 mWditions for actual device operation.Lea ..
CD4013BC ,Dual D-Type Flip-FlopApplicationslogic level present at the “D” input is transferred to the Q Automotiveoutput during t ..
CD4013BC ,Dual D-Type Flip-FlopFeaturesThe CD4013B dual D-type flip-flop is a monolithic comple-
CD4012BE-CD4012BM-CD4012BM96G4
CMOS Dual 4-Input NAND Gate
SCHS021D – Revised September 2003 The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PWR suffix). The CD4011B and CD4023B types also are supplied in 14-lead thin shrink small-outline packages (PW suffix). Copyright© 2003,
