CC430F5137IRGZR ,16-Bit Ultra-Low-Power MCU, 32KB Flash, 4KB RAM, CC1101 Radio, AES-128, 12Bit ADC, USCI 48-VQFN -40 to 85features the powerful MSP430 16-bit RISC CPU, 16-bitregisters, and constant generators that contrib ..
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CC430F5137IRGZR
16-Bit Ultra-Low-Power MCU, 32KB Flash, 4KB RAM, CC1101 Radio, AES-128, 12Bit ADC, USCI 48-VQFN -40 to 85
ECCN 5E002 TSPA- Technology/ Software Publicly Available
CC430F6137, CC430F6135, CC430F6127, CC430F6126, CC430F6125
CC430F5137, CC430F5135, CC430F5133
www.ti.com SLAS554H –MAY 2009–REVISED SEPTEMBER 2013
MSP430™ SoC With RF Core
Checkfor Samples: CC430F6137, CC430F6135, CC430F6127, CC430F6126, CC430F6125, CC430F5137, CC430F5135, CC430F5133
1FEATURES
23• True System-on-Chip (SoC) for Low-Power – Embedded Emulation Module (EEM)
Wireless Communication Applications • High-Performance Sub-1-GHz RF Transceiver Wide Supply Voltage Range: Core
3.6V Downto 1.8V – Sameasin CC1101 Ultralow-Power Consumption: – Wide Supply Voltage Range: 2.0Vto 3.6V CPU Active Mode (AM): 160 µA/MHz – Frequency Bands: 300 MHzto 348 MHz, Standby Mode (LPM3 RTC Mode): 2.0 µA 389 MHzto 464 MHz, and 779 MHzto
928 MHz– Off Mode (LPM4 RAM Retention): 1.0 µA Programmable Data Rate From 0.6 kBaud– Radioin RX:15 mA, 250 kbps, 915 MHz to 500 kBaud• MSP430 System and Peripherals High Sensitivity (–117 dBmat 0.6 kBaud,– 16-Bit RISC Architecture, Extended –111 dBmat 1.2 kBaud, 315 MHz,Memory, upto 20-MHz System Clock 1% Packet Error Rate)– Wake Up From Standby Modein Less – Excellent Receiver Selectivity and BlockingThan6µs Performance– Flexible Power-Management System With – Programmable Output Power UptoSVS and Brownout +12 dBm for All Supported Frequencies– Unified Clock System With FLL – 2-FSK, 2-GFSK, and MSK Supportedas– 16-Bit Timer TA0, Timer_A With Five Wellas OOK and Flexible ASK ShapingCapture/Compare Registers – Flexible Support for Packet-Oriented– 16-Bit Timer TA1, Timer_A With Three Systems: On-Chip Support for Sync WordCapture/Compare Registers Detection, Address Check, Flexible Packet Hardware Real-Time Clock (RTC) Length, and Automatic CRC Handling Two Universal Serial Communication – Support for Automatic Clear ChannelInterfaces Assessment (CCA) Before Transmitting (for USCI_A0 Supports UART, IrDA, SPI Listen-Before-Talk Systems)I2C, SPI – Digital RSSI Output (ADC) – Suited for Systems Targeting Compliance With EN 300 220 (Europe) and and FCC CFR Part15 (US) Targeting Compliance M-Bus Standard EN
13757‑ ‑4:2005
– Support for and
(CC430F61xx Synchronous Serial Receive
Mode for Backward Compatibility With and Existing Radio Table1 For Complete See the CC430 Family User's Guide (SLAU259) No External
