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CBT3245ABQ
Octal bus switch
1. General descriptionThe CBT3245A provides eight bits of high-speed TTL-compatible bus switching. The low resistance of the switch allows connections to be made with minimal propagation
delay.
The CBT3245A is organized as one 8-bit bus switches with one output enable (OE) input.
When OE is LOW, the switch is on and port A is connected to the B port. When OE is
HIGH, each switch is disabled. The CBT3245A is characterized for operation from 40 C
to +85 C.
2. Features and benefits5 switch connection between two ports TTL-compatible control input levels Multiple package options Latch-up protection exceeds 500 mA per JESD78 ESD protection: HBM JESD22-A114F exceeds 2000V MM JESD22-A115B exceeds 150V CDM JESD22-C101C exceeds 1000V
3. Ordering information[1] Also known as QSOP20 package
CBT3245A
Octal bus switch
Rev. 3 — 5 January 2012 Product data sheet
Table 1. Ordering informationCBT3245AD 40 C to +85C SO20 plastic small outline package; 20 leads;
body width7.5 mm
SOT163-1
CBT3245ADB 40 C to +85C SSOP20 plastic shrink small outline package; 20 leads; body width5.3 mm SOT339-1
CBT3245ADS 40 C to +85C SSOP20[1] plastic shrink small outline package; 20 leads; body
width 3.9 mm; lead pitch 0.635 mm
SOT724-1
CBT3245APW 40 C to +85C TSSOP20 plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
SOT360-1
CBT3245ABQ 40 C to +85C DHVQFN20 plastic dual-in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body
2.5 4.5 0.85 mm
SOT764-1
NXP Semiconductors CBT3245A
Octal bus switch
4. Functional diagram
5. Pinning information
5.1 Pinning
NXP Semiconductors CBT3245A
Octal bus switch
5.2 Pin description
6. Functional description[1] H= HIGH voltage level; L= LOW voltage level; Z = high-impedance OFF-state.
Table 2. Pin descriptionn.c. 1 not connected
A1 to A8 2, 3, 4, 5, 6, 7, 8, 9 data input/output (A port)
GND 10 ground (0V)
B1 to B8 18, 17, 16, 15, 14, 13, 12, 11 data input/output (B port) 19 output enable input (active LOW)
VCC 20 positive supply voltage
Table 3. Function selection[1]LAn = Bn
NXP Semiconductors CBT3245A
Octal bus switch
7. Limiting values[1] Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under Section 8. is not implied. Exposure to absolute-maximum-rated
conditions for extended periods may affect device reliability.
[2] The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
8. Recommended operating conditions
9. Static characteristics
Table 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Tamb= 40 C to +85 C, unless otherwise specified.
VCC supply voltage 0.5 +7.0 V input voltage [2] 0.5 +7.0 V
IOK output clamping current VO <0V 50 - mA output voltage [2] 0.5 +7.0 V output current VO <0V - 128 mA
IIK input clamping current VI =0V 50 - mA
Tstg storage temperature 65 +150 C
Table 5. Operating conditionsAll unused control inputs of the device must be held at VCC or GND to ensure proper device operation.
VCC supply voltage 4.0 - 5.5 V
VIH HIGH-level input voltage 2.0 - - V
VIL LOW-level input voltage - - 0.8 V
Tamb ambient temperature operating in free air 40 - +85 C
Table 6. Static characteristicsVoltages are referenced to GND (ground = 0 V).
VIK input clamping voltage VCC =4.5 V; II= 18 mA - - 1.2 V input leakage current VCC =5.5 V; VI= GND or 5.5V - - 5 A
ICC supply current VCC =5.5 V; IO =0mA; =VCCor GND 3 A
ICC additional supply current per input pin; VCC= 5.5 V; one input at
3.4 V, other inputs at VCC or GND
[2] -- 3.5 mA input capacitance control pins; VI =3V or 0V - 3.2 - pF
Cio(off) off-state input/output
capacitance
port off; VI=3 V or 0 V; OE =VCC -6.6 - pF
NXP Semiconductors CBT3245A
Octal bus switch[1] All typical values are at VCC =5V, Tamb =25C.
[2] This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
[3] Measured by the voltage drop between the An and the Bn terminals at the indicated current through the switch. ON resistance is
determined by the lowest voltage of the two (An or Bn) terminals.
10. Dynamic characteristics[1] The propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified load capacitance,
when driven by an ideal voltage source (zero output impedance).
[2] tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
RON ON resistance VCC =4.5 V; VI =0V; II =64 mA [3] -5 7
VCC =4.5 V; VI =0V; II =30 mA [3] -5 7
VCC =4.5 V; VI =2.4 V; II= 15 mA [3] -10 15
Table 6. Static characteristics …continuedVoltages are referenced to GND (ground = 0 V).
Table 7. Dynamic characteristicsVoltages are referenced to GND (ground=0 V). For test circuit see Figure7.
tpd propagation delay An, Bn to Bn, An; see Figure5 [1][2]
VCC = 5.0V 0.5V - 0.25 ns
ten enable time OE to An or Bn; see Figure6 [2]
VCC = 5.0V 0.5V 1.0 5.9 ns
tdis disable time OE to An or Bn; see Figure6 [2]
VCC = 5.0V 0.5V 1.0 6.0 ns
NXP Semiconductors CBT3245A
Octal bus switch
11. Waveforms
Table 8. Measurement pointsVCC = 5.0V 0.5V GND to 3.0 V 1.5 V 1.5 V VOL + 0.3 V VOH 0.3 V
NXP Semiconductors CBT3245A
Octal bus switch
12. Test information
Table 9. Test dataVCC = 5.0V 0.5V GND to 3.0 V 2.5ns 50pF 500 open 7.0 V open
NXP Semiconductors CBT3245A
Octal bus switch
13. Package outline
