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CBT3126DS-CBT3126PW
Quad FET bus switch
General descriptionThe CBT3126 is a quad FET bus switch with independent line switches. Each switch is
disabled when the associated Output Enable (OE) input is LOW.
The CBT3126 is characterized for operation from −40 °Cto+85 °C.
Features Standard ’126-type pinout Multiple package options5 Ω switch connection between two ports TTL-compatible input levels Minimal propagation delay through the switch Latch-up protection exceeds 500 mA per JEDEC standard JESD78 class II level A ESD protection: HBM JESD22-A114E exceeds 2000V MM JESD22-A115-A exceeds 200V CDM JESD22-C101C exceeds 1000V Specified from −40 °Cto+85°C
Ordering information[1] Also known as QSOP16.
CBT3126
Quad FET bus switch
Rev. 04 — 12 October 2009 Product data sheet
Table 1. Ordering informationCBT3126D −40 °Cto+85°C SO14 plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
CBT3126DB −40 °Cto+85°C SSOP14 plastic shrink small outline package; 14 leads;
body width 5.3 mm
SOT337-1
CBT3126PW −40 °Cto+85°C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
CBT3126DS −40 °Cto+85°C SSOP16[1] plastic shrink small outline package; 16 leads;
body width 3.9 mm; lead pitch 0.635 mm
SOT519-1
NXP Semiconductors CBT3126
Quad FET bus switch Functional diagram Pinning information
5.1 Pinning
5.2 Pin description
Table 2. Pin description1OE to 4OE 1, 4, 10, 13 2, 5, 12, 15 output enable input
1A to 4A, 2, 5, 9, 12 3, 6, 11, 14 A input/output
1B to 4B 3, 6, 8, 11 4, 7, 10, 13 B output/input
NXP Semiconductors CBT3126
Quad FET bus switch Functional description Limiting values[1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
[2] The package thermal impedance is calculated from JESD51-7.
[3] For SO14 package; Ptot derates linearly with 8 mW/K above 70°C.
[4] For SSOP14, SSOP16 and TSSOP14 packages; Ptot derates linearly with 5.5 mW/K above 70°C.
Recommended operating conditionsGND 7 8 ground (0V)
VCC 14 16 positive supply voltage
n.c. - 1, 9 not connected
Table 2. Pin description …continued
Table 3. Function selection= HIGH voltage level; L= LOW voltage level. nA to nB disconnected nA to nB connected
Table 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VCC supply voltage −0.5 +7.0 V input voltage [1] −0.5 +7.0 V
ISW switch current continuous current through each switch - 128 mA
IIK input clamping current VI <0V −50 - mA
Tstg storage temperature −65 +150 °C
Ptot total power dissipation Tamb = −40 °C to +125°C [2]
SO14 package [3]- 500 mW
SSOP14 and SSOP16 package [4]- 500 mW
TSSOP14 package [4]- 500 mW
Table 5. Operating conditionsAll unused control inputs of the device must be held at VCC or GND to ensure proper device operation.
VCC supply voltage 4.5 5.5 V
VIH HIGH-level input voltage 2.0 - V
VIL LOW-level input voltage - 0.8 V
Tamb ambient temperature operating in free-air −40 +85 °C
NXP Semiconductors CBT3126
Quad FET bus switch Static characteristics[1] All typical values are measured at VCC =5V; Tamb =25°C.
[2] This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
[3] Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. ON resistance is
determined by the lowest voltage of the two (A or B) terminals.
10. Dynamic characteristics[1] This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical ON
resistance of the switch and a load capacitance, when driven by an ideal voltage source (zero output impedance).
[2] tPLH and tPHL are the same as tpd;
tPZL and tPZH are the same as ten;
tPLZ and tPHZ are the same as tdis.
Table 6. Static characteristicsTamb= −40°Cto +85 °C.
VIK input clamping voltage VCC= 4.5 V; II= −18 mA - - −1.2 V
Vpass pass voltage VI =VCC= 5.0 V; ISW= −100μA - 3.8 - V input leakage current VCC= 5.5 V; VI= GND or 5.5V - - ±1 μA
ICC supply current VCC= 5.5 V; ISW=0 mA; =VCCor GND
--3 μA
ΔICC additional supply current control pins; per input;
VCC= 5.5 V; one input at 3.4V,
other inputs at VCC or GND
[2]- - 2.5 mA input capacitance control pins; VI=3 V or 0V - 1.7 - pF
Cio(off) off-state input/output capacitance VO=3 V or 0 V; nOE= VCC - 3.4 - pF
RON ON resistance VCC= 4.0V [3]= 2.4 V; II=15 mA - 16 22 Ω
VCC= 4.5V =0V; II =64mA - 5 7 Ω =0V; II =30mA - 5 7 Ω= 2.4 V; II=15 mA - 10 15 Ω
Table 7. Dynamic characteristicsTamb= −40°Cto +85 °C; VCC= 4.5 V to 5.5 V; for test circuit see Figure8.
tpd propagation delay nA to nB or nB to nA; see Figure6 [1][2]- 0.25 ns
ten enable time nOE to nA or nB; see Figure7 [2] 1.6 4.5 ns
tdis disable time nOE to nA or nB; see Figure7 [2] 1.0 5.4 ns
NXP Semiconductors CBT3126
Quad FET bus switch
11. AC waveforms
Table 8. Measurement points1.5 V 1.5 V VOL + 0.3 V VOH − 0.3 V
NXP Semiconductors CBT3126
Quad FET bus switch
12. Test information
Table 9. Test data4.5 V to 5.5 V GND to 3.0 V ≤ 2.5 ns 50 pF 500Ω open 7.0 V open
NXP Semiconductors CBT3126
Quad FET bus switch
13. Package outline
Fig 9. Package outline SOT108-1 (SO14)
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
