CAT5221 ,Dual 64-Tap DPP with 2-Wire Interface2CAT5221Table 1. PIN DESCRIPTIONPin (SOIC) Name Function1 R Wiper Terminal for Potentiometer 0W02 R ..
CAT522WI , Configured Digitally Programmable Potentiometer (DPP™): Programmable Voltage Applications
CAT5251YI-50 , Quad Digitally Programmable Potentiometer (DPP™) with 256 Taps and SPI Interface
CAT5251YI-50 , Quad Digitally Programmable Potentiometer (DPP™) with 256 Taps and SPI Interface
CAT6217 ,LDO, 150 mA2CAT6217Table 3. ELECTRICAL OPERATING CHARACTERISTICS (Note 3)(V = V + 1.0 V, V = High, I = 100 A, ..
CAT6218 ,LDO, 300 mA2CAT6218Table 3. ELECTRICAL OPERATING CHARACTERISTICS (Note 3)(V = V + 1.0 V, V = High, I = 100 A, ..
CD74HC4046APWRG4 ,High Speed CMOS Logic Phase-Locked-Loop with VCO 16-TSSOP -55 to 125General DescriptionVCO Phase ComparatorsThe signal input (SIG ) can be directly coupled to the self ..
CD74HC4049E ,High Speed CMOS Logic Hex Inverting BuffersMaximum Ratings Thermal InformationDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . ..
CD74HC4049PWR ,High Speed CMOS Logic Hex Inverting BuffersCD54HC4049, CD74HC4049,CD54HC4050, CD74HC4050Data sheet acquired from Harris SemiconductorSCHS205IH ..
CD74HC4050 ,High Speed CMOS Logic Hex Non-Inverting BuffersMaximum Ratings Thermal InformationDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . ..
CD74HC4050E ,High Speed CMOS Logic Hex Non-Inverting BuffersFeatures Description• Typical Propagation Delay: 6ns at V = 5V,CCThe ’HC4049 and ’HC4050 are fabric ..
CD74HC4050M ,High Speed CMOS Logic Hex Non-Inverting BuffersLogic DiagramsHC4049 HC4050AYA Y2CD54HC4049, CD74HC4049, CD54HC4050, CD74HC4050Absolute
CAT5221
Dual 64-Tap DPP with 2-Wire Interface
CAT5221
Dual Digital
Potentiometer (POT)
with 64 T aps
and I2 C Interface
DescriptionThe CAT5221 is two digital POTs integrated with control logic and
16 bytes of NVRAM memory. Each digital POT consists of a series of
63 resistive elements connected between two externally accessible end
points. The tap points between each resistive element are connected to
the wiper outputs with CMOS switches. A separate 6-bit control
register (WCR) independently controls the wiper tap switches for each
digital POT. Associated with each wiper control register are four 6-bit
non-volatile memory data registers (DR) used for storing up to four
wiper settings. Writing to the wiper control register or any of the
non-volatile data registers is via a I2 C serial bus. On power-up, the
contents of the first data register (DR0) for each of the four
potentiometers is automatically loaded into its respective wiper
control register (WCR).
The CAT5221 can be used as a potentiometer or as a two terminal,
variable resistor. It is intended for circuit level or system level
adjustments in a wide variety of applications.
Features Two Linear-taper Digital Potentiometers 64 Resistor Taps per Potentiometer End to End Resistance 2.5 k�, 10 k�, 50 k� or 100 k� Potentiometer Control and Memory Access via I2 C Interface Low Wiper Resistance, Typically 80 � Nonvolatile Memory Storage for Up to Four Wiper Settings for Each
Potentiometer Automatic Recall of Saved Wiper Settings at Power Up 2.5 to 6.0 Volt Operation Standby Current less than 1 �A 1,000,000 Nonvolatile WRITE Cycles 100 Year Nonvolatile Memory Data Retention 20-lead SOIC and TSSOP Packages Industrial Temperature Range These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
