CAT28F020 ,Bulk Erase Flash Memory, 2MbBLOCK DIAGRAMI/O –I/O0 7I/O BUFFERSERASE VOLTAGESWITCHWEDATA SENSECOMMANDPROGRAM VOLTAGECE, OE LOGI ..
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CD74ACT541M ,Octal Non-Inverting Buffers/Line Drivers with 3-State Outputs Data sheet acquired from Harris SemiconductorSCHS285A – Revised November 1999The CD54/74AC540, ..
CD74ACT541SM ,Octal Non-Inverting Buffers/Line Drivers with 3-State Outputs Data sheet acquired from Harris SemiconductorSCHS285A – Revised November 1999The CD54/74AC540, ..
CD74ACT541SM ,Octal Non-Inverting Buffers/Line Drivers with 3-State Outputs Data sheet acquired from Harris SemiconductorSCHS285A – Revised November 1999The CD54/74AC540, ..
CD74ACT541SM ,Octal Non-Inverting Buffers/Line Drivers with 3-State Outputs Data sheet acquired from Harris SemiconductorSCHS285A – Revised November 1999The CD54/74AC540, ..
CD74ACT573E ,Octal Non-Inverting Transparent Latches with 3-State OutputsTechnical DataCD54174ACS63 'Eiiii'iT/7ii7airr''si'y6iiii)iiiiyiifis'3", CtttM/tiTACTsr3563 573Octal ..
CD74ACT573M ,Octal Non-Inverting Transparent Latches with 3-State OutputsFeatures:- I Buffered inputs't 92cs_ "Ls I Typical propagation delay:FUNCTIONAL DIAGRAM 4.3 ns @ Vo ..
CAT28F020
Bulk Erase Flash Memory, 2Mb
I/O0 –I/O70–A17
FEATURES Fast read access time: 90/120 ns Low power CMOS dissipation:
– Active: 30 mA max (CMOS/TTL levels)
– Standby: 1 mA max (TTL levels)
– Standby: 100 μA max (CMOS levels) High speed programming:
– 10 μs per byte
– 4 seconds typical chip program 0.5 seconds typical chip-erase 12.0V ± 5% programming and erase voltage Commercial, industrial and automotive
temperature ranges Stop timer for program/erase On-chip address and data latches JEDEC standard pinouts:
– 32-pin DIP
– 32-pin PLCC
– 32-pin TSOP (8 x 20) 100,000 program/erase cycles 10 year data retention Electronic signatureusing a two write cycle scheme. Address and Data are
latched to free the I/O bus and address bus during the
write operation.
The CAT28F020 is manufactured using Catalyst’s
advanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles and has a data
retention of 10 years. The device is available in JEDEC
approved 32-pin plastic DIP, 32-pin PLCC or 32-pin
TSOP packages.
DESCRIPTIONThe CAT28F020 is a high speed 256K x 8-bit electrically
erasable and reprogrammable Flash memory ideally
suited for applications requiring in-system or after-sale
code updates. Electrical erasure of the full memory
contents is achieved typically within 0.5 second.
It is pin and Read timing compatible with standard
EPROM and E2 PROM devices. Programming and
Erase are performed through an operation and verify
algorithm. The instructions are input via the I/O bus,
BLOCK DIAGRAM
2 Megabit CMOS Flash Memory T28F020Licensed Intel
second source
