BUT34 ,50 AMPERES NPN SILICON POWER DARLINGTON TRANSISTOR 850 VOLTS 250 WATTSMAXIMUM RATINGSÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ..
BUT56A , NPN EPITAXIAL SILICON TRANSISTOR(HIGH VOLTAGE SWITCHING USE IN HORIZONTAL DEFLECTION OUTPUT STAGE)
BUV26 ,Trans GP BJT NPN 90V 14A 3-Pin(3+Tab) TO-220 TubeBUV26®MEDIUM POWER NPN SILICON TRANSISTOR■ STMicroelectronics PREFERREDSALESTYPE■ NPN TRANSISTOR ■ ..
BUV26 ,Trans GP BJT NPN 90V 14A 3-Pin(3+Tab) TO-220 TubeELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted)CCharacteristic Symbol Min Max UnitOFF ..
BUV26. ,Trans GP BJT NPN 90V 14A 3-Pin(3+Tab) TO-220 TubeBUV26®MEDIUM POWER NPN SILICON TRANSISTOR■ STMicroelectronics PREFERREDSALESTYPE■ NPN TRANSISTOR ■ ..
BUV27 ,NPN Silicon Power TransistorBUV27®MEDIUM POWER NPN SILICON TRANSISTOR■ STMicroelectronics PREFERREDSALESTYPE■ NPN TRANSISTOR ■ ..
C2Q1.25 , Surface Mount Very Fast-Acting Chip Fuse
C3039 ,POWER TRANSISTORS(7.0A,400V,50W)Absolute Maximum Ratings at Ta=25°C unitI Co11eceoP-to-Batse Voltage %so 500 VCollector-eo-Emote: V ..
C3068 , TYPE CMP / CL3P
C3068 , TYPE CMP / CL3P
C30902S , Silicon Avalanche Photodiodes
C30T04QH , Schottky Barrier Diode
BUT34
50 AMPERES NPN SILICON POWER DARLINGTON TRANSISTOR 850 VOLTS 250 WATTS
-"# &" "$ "##$ "# &$ #$$"
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The BUT34 Darlington transistor is designed for high–voltage, high–speed, power
switching in inductive circuits where fall time is critical. They are particularly suited for
line–operated SWITCHMODE applications such as: AC and DC Motor Controls Switching Regulators Inverters Solenoid and Relay Drivers Fast Turn–Off Times
0.7 μs Inductive Fall Time at 25 C (Typ)
1.8 μs Inductive Storage Time at 25 C (Typ) Operating Temperature Range –65 to 200C
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(1) Pulse Test: Pulse Width = 5 ms, Duty Cycle 10%.
Designer’s and SWITCHMODE are trademarks of Motorola, Inc.
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limitcurves — representing boundaries on device characteristics — are given to facilitate “worst case” design.