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BUK98150-55A |BUK9815055APHILIPSN/a3494avaiTrenchMOS(tm) logic level FET
BUK98150-55A |BUK9815055ANXPN/a3000avaiTrenchMOS(tm) logic level FET


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BUK98150-55A
TrenchMOS(tm) logic level FET
BUK98150-55A renchMOS™ logic level FET
Rev. 02 — 25 March 2002 Product data
M3D087 Description
N-channel enhancement mode field-effect power transistorina plastic package using
TrenchMOS™1 technology, featuring very low on-state resistance.
Product availability:
BUK98150-55A in SOT223 (SC-73). Features TrenchMOS™ technology Q101 compliant 150 °C rated Logic level compatible. Applications Automotive and general purpose power switching: 12 V and 24 V loads Motors, lamps and solenoids. Pinning information TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.
Table 1: Pinning - SOT223 (SC-73), simplified outline and symbol
gate (g)
SOT223 (SC-73)
drain (d) source (s) drain (d)
MSB002 - 1Top view
MBB076
Philips Semiconductors BUK98150-55A
TrenchMOS™ logic level FET Quick reference data Limiting values
Table 2: Quick reference data

VDS drain-source voltage (DC) - 55 V drain current (DC) Tsp =25 °C; VGS =5V - 5 A
Ptot total power dissipation Tsp =25 °C- 8 W junction temperature - 150 °C
RDSon drain-source on-state resistance VGS =5V; ID=5A 128 150 mΩ
VGS= 4.5 V; ID=5A - 161 mΩ
VGS=10 V; ID = 5A 116 137 mΩ
Table 3: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage (DC) - 55 V
VDGR drain-gate voltage (DC) RGS =20kΩ -55 V
VGS gate-source voltage (DC) - ±15 V drain current (DC) Tsp =25 °C; VGS =5V; Figure2 and3 -5 A
Tsp= 100 °C; VGS =5V; Figure2 -3 A
IDM peak drain current Tsp =25 °C; pulsed; tp≤10 μs;
Figure3
-22 A
Ptot total power dissipation Tsp =25 °C; Figure1 -8 W
Tstg storage temperature −55 +150 °C operating junction temperature −55 +150 °C
Source-drain diode

IDR reverse drain current (DC) Tsp =25 °C- 5 A
IDRM peak reverse drain current Tsp =25 °C; pulsed; tp≤10μs - 22 A
Avalanche ruggedness

EDS(AL)S non-repetitive avalanche energy unclamped inductive load; ID =5A;
VDS≤55 V; VGS =5V; RGS =50Ω;
starting Tj =25°C
-31 mJ
Philips Semiconductors BUK98150-55A
TrenchMOS™ logic level FET
Philips Semiconductors BUK98150-55A
TrenchMOS™ logic level FET Thermal characteristics
7.1 Transient thermal impedance
Table 4: Thermal characteristics

Rth(j-sp) thermal resistance from junction to solder
point
Figure4 - - 15 K/W
Rth(j-a) thermal resistance from junction to ambient - 70 - K/W
Philips Semiconductors BUK98150-55A
TrenchMOS™ logic level FET Characteristics
Table 5: Characteristics
=25 °C unless otherwise specified
Static characteristics

V(BR)DSS drain-source breakdown
voltage= 0.25 mA; VGS =0V =25 °C55 - - V= −55 °C50 - - V
VGS(th) gate-source threshold voltageID=1 mA; VDS =VGS;
Figure9 =25°C 1 1.5 2 V= 150°C 0.6 - - V= −55°C - - 2.3 V
IDSS drain-source leakage current VDS=55 V; VGS =0V =25°C - 0.05 10 μA= 150°C - - 500 μA
IGSS gate-source leakage current VGS= ±10 V; VDS=0V - 2 100 nA
RDSon drain-source on-state
resistance
VGS =5V; ID =5A;
Figure7 and8 =25°C - 128 150 mΩ= 150°C - - 276 mΩ
VGS = 4.5 V; ID=5A; - - 161 mΩ
VGS =10V; ID = 5A; - 116 137 mΩ
Dynamic characteristics

Qg(tot) total gate charge VGS =5V;VDD =44V; =5A; Figure14 5.3 - nC
Qgs gate-to-source charge - 1.0 - nC
Qgd gate-to-drain (Miller) charge - 2.8 - nC
Ciss input capacitance VGS =0V; VDS =25V;=1 MHz; Figure12 240 320 pF
Coss output capacitance - 40 48 pF
Crss reverse transfer capacitance - 25 34 pF
td(on) turn-on delay time VDD=20 V; RL= 3.3Ω;
VGS =5V; RG =10Ω; -ns rise time - 57 - ns
td(off) turn-off delay time - 16 - ns fall time - 13 - ns
Philips Semiconductors BUK98150-55A
TrenchMOS™ logic level FET
Source-drain diode

VSD source-drain (diode forward)
voltage=5 A; VGS =0V;
Figure15 0.85 1.2 V
trr reverse recovery time IS=5 A; dIS/dt= −100 A/μs
VGS= −10 V; VDS =30V
-24 - ns recovered charge - 30 - nC
Table 5: Characteristics…continued
=25 °C unless otherwise specified
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