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BUK9604-40A |BUK960440APHN/a483avaiN-channel TrenchMOS logic level FET


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BUK9604-40A
N-channel TrenchMOS logic level FET
Product profile1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits AEC Q101 compliant Low conduction losses due to low
on-state resistance Suitable for logic level gate drive
sources Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications 12 V loads Automotive and general purpose
power switching Motors, lamps and solenoids
1.4 Quick reference data
BUK9604-40A
N-channel TrenchMOS logic level FET
Rev. 2 — 7 February 2011 Product data sheet
Table 1. Quick reference data
VDS drain-source
voltage≥25 °C; Tj≤ 175°C --40 V drain current VGS =5V; Tmb =25°C;
see Figure 1; see Figure 3
[1] --75 A
Ptot total power
dissipation
Tmb=25 °C; see Figure 2 --300 W
Static characteristics
RDSon drain-source
on-state
resistance
VGS =4.3 V; ID =25A; =25°C
-3.7 5.9 mΩ
VGS =10V; ID =25A; =25°C
-2.9 4 mΩ
VGS =5V; ID =25A; =25°C; see Figure 11;
see Figure 12
-3.5 4.4 mΩ
NXP Semiconductors BUK9604-40A
N-channel TrenchMOS logic level FET
[1] Continuous current is limited by package. Pinning information
[1] It is not possible to make connection to pin 2. Ordering information
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
avalanche energy =75A; Vsup≤40V;
RGS =50 Ω; VGS =5V;
Tj(init)=25 °C; unclamped
--1.6 J
Dynamic characteristics
QGD gate-drain charge VGS =5V; ID =25A;
VDS =32 V; Tj =25°C;
see Figure 13
-56 - nC
Table 1. Quick reference data …continued
Table 2. Pinning information G gate
SOT404 (D2PAK) D drain[1] source D mounting base; connected to
drain
Table 3. Ordering information
BUK9604-40A D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads
(one lead cropped)
SOT404
NXP Semiconductors BUK9604-40A
N-channel TrenchMOS logic level FET Limiting values
[1] Continuous current is limited by package.
[2] Current is limited by power dissipation chip rating.
[3] Current is limited by power dissipation chip rating
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - 40 V
VDGR drain-gate voltage RGS =20kΩ -40 V
VGS gate-source voltage -15 15 V drain current Tmb =100 °C; VGS =5V; see Figure 1 [1] -75 A
Tmb =25°C; VGS =5V; see Figure 1;
see Figure 3
[1] -75 A
[2] - 198 A
IDM peak drain current Tmb=25 °C; pulsed; tp≤10 µs;
see Figure 3 794 A
Ptot total power dissipation Tmb =25°C; see Figure 2 - 300 W
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
Source-drain diode source current Tmb =25°C [3] - 198 A
[1] -75 A
ISM peak source current pulsed; tp≤10 µs; Tmb=25°C - 794 A
Avalanche ruggedness
EDS(AL)S non-repetitive drain-source
avalanche energy =75A; Vsup≤40 V; RGS =50Ω;
VGS =5V; Tj(init)=25 °C; unclamped
-1.6 J
NXP Semiconductors BUK9604-40A
N-channel TrenchMOS logic level FET
NXP Semiconductors BUK9604-40A
N-channel TrenchMOS logic level FET Thermal characteristics
Table 5. Thermal characteristics
Rth(j-mb) thermal resistance from
junction to mounting base
see Figure 4 --0.5 K/W
Rth(j-a) thermal resistance from
junction to ambient
mounted on printed circuit
board; minimum footprint
-50 - K/W
NXP Semiconductors BUK9604-40A
N-channel TrenchMOS logic level FET CharacteristicsTable 6. Characteristics
Static characteristics
V(BR)DSS drain-source
breakdown voltage =0.25mA; VGS =0V; Tj=25°C 40 --V =0.25mA; VGS =0V; Tj= -55°C 36 - - V
VGS(th) gate-source threshold
voltage =1mA; VDS =VGS; Tj =25°C;
see Figure 10
11.5 2V =1mA; VDS =VGS; Tj= 175 °C;
see Figure 10
0.5 --V =1mA; VDS =VGS; Tj =-55 °C;
see Figure 10
--2.3 V
IDSS drain leakage current VDS =40V; VGS =0V; Tj=25°C - 0.05 10 µA
VDS =40V; VGS =0V; Tj= 175°C - - 500 µA
IGSS gate leakage current VGS =10V; VDS =0V; Tj=25°C - 2 100 nA
VGS =-10 V; VDS =0V; Tj=25°C - 2 100 nA
RDSon drain-source on-state
resistance
VGS =4.3 V; ID =25A; Tj =25°C - 3.7 5.9 mΩ
VGS =10V; ID =25A; Tj =25°C - 2.9 4 mΩ
VGS =5V; ID =25A; Tj= 175 °C;
see Figure 11; see Figure 12
--8.3 mΩ
VGS =5V; ID =25A; Tj =25 °C;
see Figure 11; see Figure 12
-3.5 4.4 mΩ
Dynamic characteristics
QG(tot) total gate charge ID =25A; VDS =32V; VGS =5V; =25°C; see Figure 13 128 - nC
QGS gate-source charge - 13 - nC
QGD gate-drain charge - 56 - nC
Ciss input capacitance VGS =0V; VDS =25V; f=1MHz; =25°C; see Figure 14 6200 8260 pF
Coss output capacitance - 1040 1250 pF
Crss reverse transfer
capacitance 680 940 pF
td(on) turn-on delay time VDS =30V; RL =1.2 Ω; VGS =5V;
RG(ext) =10 Ω; Tj =25°C
-62 - ns rise time - 309 - ns
td(off) turn-off delay time - 365 - ns fall time - 306 - ns internal drain
inductance
from upper edge of drain mounting base
to centre of die; Tj =25°C
-2.5 -nH
from drain lead 6 mm from package to
centre of die; Tj =25°C
-4.5 -nH internal source
inductance
from source lead to source bond pad; =25°C
-7.5 -nH
NXP Semiconductors BUK9604-40A
N-channel TrenchMOS logic level FET
Source-drain diode
VSD source-drain voltage IS =40A; VGS =0V; Tj =25°C;
see Figure 15 0.85 1.2 V
trr reverse recovery time IS =20A; dIS/dt= -100 A/µs;
VGS =-10 V; VDS =30 V; Tj =25°C 260 - ns recovered charge - 531 - nC
Table 6. Characteristics …continued
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