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BUK9509-55A-BUK9609-55A
TrenchMOS(TM) logic level FET
BUK95/9609-55A renchMOS™ logic level FET
Rev. 01 — 21 February 2002 Product data DescriptionN-channel enhancement mode field-effect power transistorina plastic package using
TrenchMOS™ technology, featuring very low on-state resistance.
Product availability:
BUK9509-55A in SOT78 (TO-220AB)
BUK9609-55A in SOT404 (D2 -PAK).
Features TrenchMOS™ technology Q101 compliant 175 °C rated Logic level compatible.
Applications Automotive and general purpose power switching: 12 V and 24 V loads Motors, lamps and solenoids.
Pinning information[1] It is not possible to make connection to pin 2 of the SOT404 package.
Table 1: Pinning - SOT78 and SOT404, simplified outline and symbol gate (g)
SOT78 (TO-220AB) SOT404 (D2 -PAK) drain (d) [1] source (s) mounting base;
connected to drain (d)
MBK106
MBK116
MBB076
Philips Semiconductors BUK95/9609-55A
TrenchMOS™ logic level FET Quick reference data Limiting values[1] Current is limited by power dissipation chip rating
[2] Continuous current is limited by package.
Table 2: Quick reference dataVDS drain-source voltage (DC) - 55 V drain current (DC) Tmb =25 °C; VGS=5V - 108 A
Ptot total power dissipation Tmb =25°C - 211 W junction temperature - 175 °C
RDSon drain-source on-state resistance Tj =25 °C; VGS =5V; ID =25A 7.6 9 mΩ =25 °C; VGS= 4.5 V; ID =25A - 10 mΩ =25 °C; VGS=10 V; ID =25A 6.4 8 mΩ
Table 3: Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage (DC) - 55 V
VDGR drain-gate voltage (DC) RGS =20kΩ -55 V
VGS gate-source voltage (DC) - ±15 V drain current (DC) Tmb =25 °C; VGS =5V;
Figure2 and3
[1]- 108 A
[2] -75 A
Tmb= 100 °C; VGS =5V; Figure2 [2] -75 A
IDM peak drain current Tmb =25 °C; pulsed; tp≤10 μs;
Figure3 433 A
Ptot total power dissipation Tmb =25 °C; Figure1 - 211 W
Tstg storage temperature −55 +175 °C junction temperature −55 +175 °C
Source-drain diodeIDR reverse drain current (DC) Tmb =25°C [1]- 108 A
[2] -75 A
IDRM peak reverse drain current Tmb =25 °C; pulsed; tp≤10μs - 433 A
Avalanche ruggednessEDS(AL)S non-repetitive drain-source avalanche
energy
unclamped inductive load; ID =75A;
VDS≤55 V; VGS =5V; RGS =50Ω;
starting Tmb =25°C 400 mJ
Philips Semiconductors BUK95/9609-55A
TrenchMOS™ logic level FET
Philips Semiconductors BUK95/9609-55A
TrenchMOS™ logic level FET Thermal characteristics
7.1 Transient thermal impedance
Table 4: Thermal characteristicsRth(j-mb) thermal resistance from junction to
mounting base
Figure4 - - 0.71 K/W
Rth(j-a) thermal resistance from junction to ambient vertical in still air; SOT78 package - 60 - K/W
mounted on a printed circuit board;
minimum footprint; SOT404 package 50 - K/W
Philips Semiconductors BUK95/9609-55A
TrenchMOS™ logic level FET Characteristics
Table 5: Characteristics =25 °C unless otherwise specified.
Static characteristicsV(BR)DSS drain-source breakdown
voltage= 0.25 mA; VGS =0V =25 °C55 - - V= −55 °C50 - - V
VGS(th) gate-source threshold voltageID=1 mA; VDS =VGS;
Figure9 =25°C 1 1.5 2 V= 175°C 0.5 - - V= −55°C - - 2.3 V
IDSS drain-source leakage current VDS=55 V; VGS =0V =25°C - 0.05 10 μA= 175°C - - 500 μA
IGSS gate-source leakage current VGS= ±10 V; VDS=0V - 2 100 nA
RDSon drain-source on-state
resistance
VGS =5V; ID =25A;
Figure7 and8 =25°C - 7.6 9 mΩ= 175 °C- - 18 mΩ
VGS= 4.5 V; ID =25A - - 10 mΩ
VGS =10V; ID=25A - 6.4 8 mΩ
Dynamic characteristicsQg(tot) total gate charge VGS =5V; VDD =44V; =25A; Figure14
-60 - nC
Qgs gate-to-source charge - 9 - nC
Qgd gate-to-drain (Miller) charge - 29 - nC
Ciss input capacitance VGS =0V; VDS =25V;=1 MHz; Figure12 3475 4633 pF
Coss output capacitance - 570 682 pF
Crss reverse transfer capacitance - 360 493 pF
td(on) turn-on delay time VDD=30 V; RL= 1.2Ω;
VGS =5V; RG =10Ω
-33 - ns rise time - 149 - ns
td(off) turn-off delay time - 197 - ns fall time - 131 - ns internal drain inductance from drain lead 6 mm from
package to centre of die 4.5 - nH
from contact screw on
mounting base to centre of
die SOT78 3.5 - nH
from upper edge of drain
mounting base to centre of
die SOT404 2.5 - nH internal source inductance from source lead to source
bond pad 7.5 - nH
Philips Semiconductors BUK95/9609-55A
TrenchMOS™ logic level FET
Source-drain diodeVSD source-drain (diode forward)
voltage=25 A; VGS =0V;
Figure15 0.85 1.2 V
trr reverse recovery time IS =25A; dIS/dt= −100 A/μs
VGS= −10 V; VDS =25V
-70 - ns recovered charge - 160 - nC
Table 5: Characteristics…continued =25 °C unless otherwise specified.
Philips Semiconductors BUK95/9609-55A
TrenchMOS™ logic level FET
