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BUK9240-100A |BUK9240100ANXPN/a20000avaiN-channel TrenchMOS logic level FET


BUK9240-100A ,N-channel TrenchMOS logic level FETApplications 12 V and 24 V loads Motors, lamps and solenoids Automotive and general purpose powe ..
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BUK9240-100A
N-channel TrenchMOS logic level FET
BUK9240-100A
N-channel TrenchMOS logic level FET
Rev. 02 — 15 June 2010 Product data sheet Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits Low conduction losses due to low
on-state resistance Q101 compliant Suitable for logic level gate drive
sources Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications 12 V and 24 V loads Automotive and general purpose
power switching Motors, lamps and solenoids
1.4 Quick reference data Table 1. Quick reference data
VDS drain-source
voltage≥25 °C; Tj≤ 175°C - - 100 V drain current VGS =5V; Tmb =25°C;
see Figure 1; see Figure 3
--33 A
Ptot total power
dissipation
Tmb=25 °C; see Figure 2 --114 W
Static characteristics
RDSon drain-source
on-state
resistance
VGS =10V; ID =25A; =25°C
-33 38.6 mΩ
VGS =4.5 V; ID =25A; =25°C
--44.6 mΩ
VGS =5V; ID =25A; =25°C;
see Figure 12; see Figure 13 3440mΩ
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
avalanche energy =25A; Vsup≤ 100V;
RGS =50 Ω; VGS =5V;
Tj(init)=25 °C; unclamped
--31 mJ
NXP Semiconductors BUK9240-100A
N-channel TrenchMOS logic level FET Pinning information Ordering information
Table 2. Pinning information
Table 3. Ordering information
BUK9240-100A DPAK plastic single-ended surface-mounted package (DPAK); 3 leads
(one lead cropped)
SOT428
NXP Semiconductors BUK9240-100A
N-channel TrenchMOS logic level FET Limiting values
[1] Peak drain current is limited by chip, not package.
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - - 100 V
VDGR drain-gate voltage RGS =20kΩ - - 100 V
VGS gate-source voltage -10 - 10 V drain current Tmb =25°C; VGS =5V; see Figure 1;
see Figure 3
--33 A
Tmb =100 °C; VGS =5V; see Figure 1 - - 23.8 A
IDM peak drain current Tmb =25°C; tp≤10 µs; pulsed;
see Figure 3
[1] - - 135 A
Ptot total power dissipation Tmb =25°C; see Figure 2 --114 W
Tstg storage temperature -55 - 175 °C junction temperature -55 - 175 °C
VGSM peak gate-source
voltage
pulsed; tp≤50µs -15 - 15 V
Source-drain diode source current Tmb=25°C --33 A
ISM peak source current tp≤10 µs; pulsed; Tmb=25°C - - 135 A
Avalanche ruggedness
EDS(AL)S non-repetitive
drain-source
avalanche energy =25A; Vsup≤ 100 V; RGS =50Ω;
VGS =5V; Tj(init)=25 °C; unclamped
--31 mJ
NXP Semiconductors BUK9240-100A
N-channel TrenchMOS logic level FET
NXP Semiconductors BUK9240-100A
N-channel TrenchMOS logic level FET Thermal characteristics
Table 5. Thermal characteristics
Rth(j-mb) thermal resistance
from junction to
mounting base
--1.3 K/W
Rth(j-a) thermal resistance
from junction to
ambient
see Figure 4 - 71.4 - K/W
NXP Semiconductors BUK9240-100A
N-channel TrenchMOS logic level FET Characteristics
Table 6. Characteristics
Static characteristics
V(BR)DSS drain-source
breakdown voltage =0.25mA; VGS =0V; Tj=25°C 100 - - V =0.25mA; VGS =0V; Tj= -55°C 89 - - V
VGS(th) gate-source threshold
voltage =1mA; VDS =VGS; Tj =-55 °C;
see Figure 11
--2.3 V =1mA; VDS =VGS; Tj =25°C;
see Figure 11
11.5 2V =1mA; VDS =VGS; Tj= 175 °C;
see Figure 11
0.5 --V
IDSS drain leakage current VDS =100 V; VGS =0V; Tj= 175°C - - 500 µA
VDS =100 V; VGS =0V; Tj=25°C - 0.05 10 µA
IGSS gate leakage current VDS =0V; VGS =10V; Tj=25°C - 2 100 nA
VDS =0V; VGS =-10 V; Tj=25°C - 2 100 nA
RDSon drain-source on-state
resistance
VGS =5V; ID =25A; Tj= 175 °C;
see Figure 12; see Figure 13 - 100 mΩ
VGS =10V; ID =25A; Tj=25°C - 33 38.6 mΩ
VGS =4.5 V; ID =25A; Tj=25°C - - 44.6 mΩ
VGS =5V; ID =25A; Tj =25 °C;
see Figure 12; see Figure 13 3440mΩ
Dynamic characteristics
Ciss input capacitance VGS =0V; VDS =25V; f=1MHz; =25°C; see Figure 14 2304 3072 pF
Coss output capacitance - 222 266.4 pF
Crss reverse transfer
capacitance 151 207 pF
td(on) turn-on delay time VDS =30V; RL =1.2 Ω; VGS =5V;
RG(ext) =10 Ω; Tj =25°C
-20 - ns rise time - 135 - ns
td(off) turn-off delay time - 125 - ns fall time - 90 - ns internal drain
inductance
measured from drain lead from package
to centre of die ; Tj =25°C
-2.5 -nH internal source
inductance
measured from source lead from
package to source bond pad; =25°C
-7.5 -nH
Source-drain diode
VSD source-drain voltage IS =25A; VGS =0V; Tj =25°C;
see Figure 15 0.85 1.2 V
trr reverse recovery time IS =20A; dIS/dt= -100 A/µs;
VGS =-10 V; VDS =30 V; Tj =25°C
-60 - ns recovered charge - 240 - nC
NXP Semiconductors BUK9240-100A
N-channel TrenchMOS logic level FET
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