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BUK9215-55A
N-channel TrenchMOS logic level FET
A BUK9215-55AN-channel TrenchMOS logic level FET7 April 2014 Product data sheet General descriptionLogic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified tothe appropriate AEC standard for use in automotive critical applications.
Features and benefits AEC Q101 compliant• Low conduction losses due to low on-state resistance• Suitable for logic level gate drive sources• Suitable for thermally demanding environments due to 175 °C rating
Applications 12 V and 24 V loads• Automotive and general purpose power switching• Motors, lamps and solenoids
Quick reference data
Table 1. Quick reference data
Symbol Parameter Conditions Min Typ Max UnitVDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 55 V drain current VGS = 5 V; Tmb = 25 °C; Fig. 2; Fig. 3 [1] - - 62 A
Ptot total power dissipation Tmb = 25 °C; Fig. 1 - - 115 W
Static characteristicsVGS = 10 V; ID = 25 A; Tj = 25 °C - 11 13.6 mΩ
VGS = 4.5 V; ID = 25 A; Tj = 25 °C - - 16.6 mΩ
RDSon drain-source on-state
resistance
VGS = 5 V; ID = 25 A; Tj = 25 °C;
Fig. 11; Fig. 12 13 15 mΩ
Dynamic characteristicsQGD gate-drain charge VGS = 5 V; ID = 25 A; VDS = 44 V;
Tj = 25 °C; Fig. 9 20 - nC
NXP Semiconductors BUK9215-55A
N-channel TrenchMOS logic level FET
Symbol Parameter Conditions Min Typ Max Unit
Avalanche ruggednessEDS(AL)S non-repetitive drain-
source avalancheenergy
ID = 62 A; Vsup ≤ 55 V; RGS = 50 Ω;
VGS = 5 V; Tj(init) = 25 °C; unclamped - 211 mJ
[1] Current is limited by power dissipation chip rating.
Pinning information
Table 2. Pinning information
Pin Symbol Description Simplified outline Graphic symbol G gate D drain S source D mounting base; connected to
drain 3
DPAK (SOT428)mbb076
Ordering information
Table 3. Ordering information
PackageType number
Name Description VersionBUK9215-55A DPAK plastic single-ended surface-mounted package (DPAK); 3 leads(one lead cropped) SOT428
NXP Semiconductors BUK9215-55A
N-channel TrenchMOS logic level FET Limiting values
Table 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max UnitVDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 55 V
VDGR drain-gate voltage RGS = 20 kΩ - 55 V
VGS gate-source voltage -15 15 V
Ptot total power dissipation Tmb = 25 °C; Fig. 1 - 115 W
[1] - 62 ATmb = 25 °C; VGS = 5 V; Fig. 2; Fig. 3
[2] - 55 A drain current
Tmb = 100 °C; VGS = 5 V; Fig. 2 [1] - 44 A
IDM peak drain current Tmb = 25 °C; pulsed; tp ≤ 10 µs; Fig. 3 - 248 A
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
Source-drain diode[2] - 55 AIS source current Tmb = 25 °C
[1] - 62 A
ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 248 A
Avalanche ruggednessEDS(AL)S non-repetitive drain-source
avalanche energy
ID = 62 A; Vsup ≤ 55 V; RGS = 50 Ω;
VGS = 5 V; Tj(init) = 25 °C; unclamped 211 mJ
[1] Current is limited by power dissipation chip rating.[2] Continious current is limited by bond wires.
NXP Semiconductors BUK9215-55A
N-channel TrenchMOS logic level FETTmb(°C)0 20015050 100
03aa16
Pder(%)
Fig. 1. Normalized total power dissipation as a
function of mounting base temperature03nf79 50 75 100 125 150 175 200Tmb (°C)(A) Cappedat55Adueto limitationof bondwires
Fig. 2. Continuous drain current as a function of
mounting base temperature03nf78
103 10 102VDS(V)
100msms
RDSon= VDS/IDms= 10µs
100µs(A)δ=
NXP Semiconductors BUK9215-55A
N-channel TrenchMOS logic level FET Thermal characteristics
Table 5. Thermal characteristics
Symbol Parameter Conditions Min Typ Max UnitRth(j-mb) thermal resistance
from junction tomounting base
Fig. 4 - - 1.3 K/W
Rth(j-a) thermal resistancefrom junction to
ambient 71.4 - K/W
03nf77
Single Shot
10-6 10-5 10-4 10-3 10-2 10-1 1tp(s)
Zth(j-mb)(K/W)0.5δ=
Fig. 4. Transient thermal impedance from junction to mounting base as a function of pulse duration
NXP Semiconductors BUK9215-55A
N-channel TrenchMOS logic level FET Characteristics
Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristicsID = 0.25 mA; VGS = 0 V; Tj = 25 °C 55 - - VV(BR)DSS drain-source breakdown voltage ID = 0.25 mA; VGS = 0 V; Tj = -55 °C 50 - - V
ID = 1 mA; VDS = VGS; Tj = -55 °C;
Fig. 10 - 2.3 V
ID = 1 mA; VDS = VGS; Tj = 175 °C;
Fig. 10
0.5 - - V
VGS(th) gate-source threshold
voltage
ID = 1 mA; VDS = VGS; Tj = 25 °C;
Fig. 10 1.5 2 V
VDS = 55 V; VGS = 0 V; Tj = 25 °C - 0.05 10 µAIDSS drain leakage current
VDS = 55 V; VGS = 0 V; Tj = 175 °C - - 500 µA
VGS = 10 V; VDS = 0 V; Tj = 25 °C - 2 100 nAIGSS gate leakage current
VGS = -10 V; VDS = 0 V; Tj = 25 °C - 2 100 nA
VGS = 10 V; ID = 25 A; Tj = 25 °C - 11 13.6 mΩ
VGS = 4.5 V; ID = 25 A; Tj = 25 °C - - 16.6 mΩ
VGS = 5 V; ID = 25 A; Tj = 175 °C;
Fig. 11; Fig. 12 - 30 mΩ
RDSon drain-source on-stateresistance
VGS = 5 V; ID = 25 A; Tj = 25 °C;
Fig. 11; Fig. 12 13 15 mΩ
Dynamic characteristicsQG(tot) total gate charge - 48 - nC
QGS gate-source charge - 6 - nC
QGD gate-drain charge
ID = 25 A; VDS = 44 V; VGS = 5 V;
Tj = 25 °C; Fig. 9 20 - nC
Ciss input capacitance - 2190 2916 pF
Coss output capacitance - 380 450 pF
Crss reverse transfer
capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Tj = 25 °C; Fig. 13 250 344 pF
td(on) turn-on delay time - 19 - ns rise time - 161 - ns
td(off) turn-off delay time - 138 - ns fall time
VDS = 30 V; RL = 1.2 Ω; VGS = 5 V;
RG(ext) = 10 Ω; Tj = 25 °C 165 - ns internal draininductance measured from drain to centre of die - 2.5 - nH
NXP Semiconductors BUK9215-55A
N-channel TrenchMOS logic level FET
Symbol Parameter Conditions Min Typ Max Unit internal sourceinductance measured from source lead to sourcebond pad - 7.5 - nH
Source-drain diodeVSD source-drain voltage IS = 20 A; VGS = 0 V; Tj = 25 °C; Fig. 14 - 0.85 1.2 V
trr reverse recovery time - 51 - ns recovered charge
IS = 20 A; dIS/dt = -100 A/µs;
VGS = -10 V; VDS = 30 V; Tj = 25 °C - 102 - nC
03nb61
300 2 4 6 8 10VDS(V)(A)
2.2 VGS(V)=10
Fig. 5. Output characteristics: drain current as a function of drain-source voltage; typical values03nf85 6 9 12 15VGS(V)
RDSon(mΩ)
Fig. 6. Drain-source on-state resistance as a functionof gate-source voltage; typical values03aa35-2
10-1(A)
min typ max
03nb58 20 40 60 80 100ID(A)
gfs(S)
Fig. 8. Forward transconductance as a function of
drain current; typical values