BUK129-50DL ,Logic level TOPFET SMD version of BUK118-50DLLIMITING VALUESAt a drain source voltage above 50 V the power MOSFET is actively turned on to clamp ..
BUK130-50DL ,Logic level TOPFET SMD version of BUK119-50DL
BUK139-50DL ,Logic level TOPFET D-PAK version of BUK118-50DLLIMITING VALUESAt a drain source voltage above 50 V the power MOSFET is actively turned on to clamp ..
BUK202-50X ,PowerMOS transistor TOPFET high side switch
BUK202-50Y ,PowerMOS transistor TOPFET high side switch
BUK202-50Y ,PowerMOS transistor TOPFET high side switch
C2012JB0J226M , General Multilayer Ceramic Chip Capacitors
C2012JB0J226M , General Multilayer Ceramic Chip Capacitors
C2012X5R1A225K , Ceramic Capacitors For General Use SMD
C2012X7R1C105K , Ceramic Capacitors For General Use SMD
C2012X7R1C105K , Ceramic Capacitors For General Use SMD
C2042 , Analog Devices AD20MSP930 CPE Line Transformer Meet requirements of IEC60950 for supplementary insulation, 250V working voltage
BUK129-50DL
Logic level TOPFET SMD version of BUK118-50DL
Philips Semiconductors Product specification
Logic level TOPFET BUK129-50DL
SMD version of BUK118-50DL
DESCRIPTION QUICK REFERENCE DATAMonolithic temperature and
SYMBOL PARAMETER MAX. UNIToverload protected logic level powerMOSFET in TOPFET2 technology VDS Continuous drain source voltage 50 V
assembled in a 3 pin surface mount ID Continuous drain current 16 A
plastic package. PD Total power dissipation 65 WTj Continuous junction temperature 150 ˚C
APPLICATIONS RDS(ON) Drain-source on-state resistance 50 mΩ
General purpose switch for driving IISL Input supply current VIS = 5 V 650 µAlamps
motors
solenoidsheaters
in automotive systems and other
applications.
FEATURES FUNCTIONAL BLOCK DIAGRAMTrenchMOS output stage
Current limiting
Overload protection
Overtemperature protection
Protection latched reset by input
5 V logic compatible input level
Control of output stage and
supply of overload protection
circuits derived from input
Low operating input current
permits direct drive by
micro-controller
ESD protection on all pins
Overvoltage clamping for turn
off of inductive loads
Fig.1. Elements of the TOPFET.
PINNING - SOT404 PIN CONFIGURATION SYMBOL
PIN DESCRIPTION input drain source drain
TOPFET
Philips Semiconductors Product specification
Logic level TOPFET BUK129-50DL
SMD version of BUK118-50DL
LIMITING VALUESLimiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNITVDS Continuous drain source voltage1 - - 50 V Continuous drain current VIS = 5 V; Tmb = 25 ˚C - self - A
limited Continuous drain current VIS = 5 V; Tmb ≤ 125 ˚C - 16 A Continuous input current - -5 5 mA
IIRM Non-repetitive peak input current tp ≤ 1 ms -10 10 mA Total power dissipation Tmb ≤ 25 ˚C - 65 W
Tstg Storage temperature - -55 175 ˚C Continuous junction temperature2 normal operation - 150 ˚C
Tsold Case temperature during soldering - 260 ˚C
ESD LIMITING VALUE
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT Electrostatic discharge capacitor Human body model; - 2 kV
voltage C = 250 pF; R = 1.5 kΩ
OVERVOLTAGE CLAMPING LIMITING VALUESAt a drain source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients.
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
Inductive load turn-off IDM = 16 A; VDD ≤ 20 V
EDSM Non-repetitive clamping energy Tmb ≤ 25 ˚C - 200 mJ
EDRM Repetitive clamping energy Tmb ≤ 95 ˚C; f = 250 Hz - 32 mJ
OVERLOAD PROTECTION LIMITING VALUEWith an adequate protection supply provided via the input pin, TOPFET can protect itself from two types of overload
- overtemperature and short circuit load.
SYMBOL PARAMETER REQUIRED CONDITION MIN. MAX. UNITVDS Drain source voltage3 4 V ≤ VIS ≤ 5.5 V 0 35 V
THERMAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Thermal resistanceRth j-mb Junction to mounting base - - 1.75 1.92 K/W
Rth j-a Junction to ambient minimum footprint FR4 PCB - 50 - K/W
Philips Semiconductors Product specification
Logic level TOPFET BUK129-50DL
SMD version of BUK118-50DL
OUTPUT CHARACTERISTICSLimits are for -40˚C ≤ Tmb ≤ 150˚C; typicals are for Tmb = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Off-state VIS = 0 V
V(CL)DSS Drain-source clamping voltage ID = 10 mA 50 - - V
IDM = 2 A; tp ≤ 300 µs; δ ≤ 0.01 50 60 70 V
IDSS Drain source leakage current VDS = 40 V - - 100 µA
Tmb = 25 ˚C - 0.1 10 µA
On-state IDM = 6 A; tp ≤ 300 µs; δ ≤ 0.01
RDS(ON) Drain-source resistance VIS ≥ 4.4 V - - 95 mΩ
Tmb = 25 ˚C - 36 50 mΩ
VIS ≥ 4 V - - 100 mΩ
Tmb = 25 ˚C - 39 55 mΩ
OVERLOAD CHARACTERISTICS-40˚C ≤ Tmb ≤ 150˚C unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Short circuit load VDS = 13 V Drain current limiting VIS = 5 V; Tmb = 25˚C 16 24 32 A
4.4 V ≤ VIS ≤ 5.5 V 12 - 36 A
4 V ≤ VIS ≤ 5.5 V 8 - 36 A
Overload protection VIS = 5 V;Tmb = 25˚C
PD(TO) Overload power threshold device trips if PD > PD(TO) 40 120 160 W
TDSC Characteristic time which determines trip time1 200 350 600 µs
Overtemperature protectionTj(TO) Threshold junction 150 170 - ˚C
temperature2
Philips Semiconductors Product specification
Logic level TOPFET BUK129-50DL
SMD version of BUK118-50DL
INPUT CHARACTERISTICSThe supply for the logic and overload protection is taken from the input.
Limits are for -40˚C ≤ Tmb ≤ 150˚C; typicals are for Tmb = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNITVIS(TO) Input threshold voltage VDS = 5 V; ID = 1 mA 0.6 - 2.4 V
Tmb = 25˚C 1.1 1.6 2.1 V
IIS Input supply current normal operation; VIS = 5 V 100 220 400 µA
VIS = 4 V 80 195 330 µA
IISL Input supply current protection latched; VIS = 5 V 200 400 650 µA
VIS = 3 V 130 250 430 µA
VISR Protection reset voltage1 reset time tr ≥ 100 µs 1.5 2 2.9 V
tlr Latch reset time VIS1 = 5 V, VIS2 < 1 V 10 40 100 µs
V(CL)IS Input clamping voltage II = 1.5 mA 5.5 - 8.5 V
RIG Input series resistance2 Tmb = 25˚C - 33 - kΩ
to gate of power MOSFET
SWITCHING CHARACTERISTICSTmb = 25 ˚C; VDD = 13 V; resistive load RL = 4 Ω. Refer to waveform figure and test circuit.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNITtd on Turn-on delay time VIS = 5 V - 15 30 µs Rise time - 30 60 µsd off Turn-off delay time VIS = 0 V - 70 140 µs Fall time - 35 70 µs
Philips Semiconductors Product specification
Logic level TOPFET BUK129-50DL
SMD version of BUK118-50DL
MECHANICAL DATAFig.2. SOT404 surface mounting package1 , centre pin connected to mounting base.
Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads
(one lead cropped) SOT404
Philips Semiconductors Product specification
Logic level TOPFET BUK129-50DL
SMD version of BUK118-50DL
DEFINITIONS
DATA SHEET STATUS
DATA SHEET PRODUCT DEFINITIONS
STATUS1
STATUS2
Objective data Development This data sheet contains data from the objective specification for
product development. Philips Semiconductors reserves the right to
change the specification in any manner without notice
Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in ordere to improve the design and supply the best possible
product
Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in
order to improve the design, manufacturing and supply. Changes will
be communicated according to the Customer Product/Process
Change Notification (CPCN) procedure SNW-SQ-650A
Limiting valuesLimiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application informationWhere application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 2001
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONSThese products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resultingfrom such improper use or sale.