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BTS7750GP
Smart Motorbridges + Driver ICs
TrilithIC
Data Sheet
BTS7750GP
1Overview
1.1FeaturesQuad D-MOS switch driverFree configurable as bridge or quad-switchOptimized for DC motor management applications
Low RDSON: 70mτ high-side switch, 45mτ low-
side switch (typical values @25C) Maximum peak current: typ. 12 A @ 25C=Very low quiescent current: typ. 5 ←A @ 25 C=Small outline, thermal optimized PowerPak Full short-circuit-protectionOperates up to 40 VStatus flag diagnosisOvertemperature shut down with hysteresisInternal clamp diodesIsolated sources for external current sensingUnder-voltage detection with hysteresisPWM frequencies up to 1 kHz
1.2DescriptionThe BTS
7750GP is part of the TrilithIC family containing three dies in one package:
One double high-side switch and two low-side switches. The drains of these three
vertical DMOS chips are mounted on separated leadframes. The sources are connected
to individual pins, so the BTS
7750GP can be used in H-bridge- as well as in any otherconfiguration. Both the double high-side and the two low-side switches of the
BTS7750GP are manufactured in SMART SIPMOS® technology which combines low
RDSON vertical DMOS power stages with CMOS control circuitry. The high-side switch isfully protected and contains the control and diagnosis circuitry. Also the low-side
switches are fully protected, the equivalent standard product is the BTS
134D.In contrast to the
BTS7750G, which consists of the same chips in an
P-DSO-28package, the P-TO263-15-1 PowerPack offers a much lower thermal resistance, which
opens up applications with even higher currents in the automotive and industrial area.
1.3Pin Configuration(top view)
Figure 1
Pins written in bold type need power wiring.
1.4Pin Definitions and Functions
1.5Functional Block Diagram
Figure 2
Block Diagram
1.6Circuit Description
Input CircuitThe control inputs IH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with
hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into
the necessary form for driving the power output stages. The inputs are protected by ESD
clamp-diodes.
The inputs IL1 and IL2 are connected to the internal gate-driving units of the N-channel
vertical power-MOS-FETs.
Output StagesThe output stages consist of an low RDSON Power-MOS H-bridge. In H-bridge
configuration, the D-MOS body diodes can be used for freewheeling when commutating
inductive loads. If the high-side switches are used as single switches, positive and
negative voltage spikes which occur when driving inductive loads are limited by
integrated power clamp diodes.
Short Circuit Protection The outputs are protected againstoutput short circuit to groundoutput short circuit to the supply voltage, andoverload (load short circuit).
An internal OP-Amp controls the Drain-Source-Voltage by comparing the DS-Voltage-
Drop with an internal reference voltage. Above this trippoint the OP-Amp reduces the
output current depending on the junction temperature and the drop voltage.
In the case of overloaded high-side switches the status output is set to low.
The fully protected low-side switches have no status output.
Overtemperature Protection The high-side and the low-side switches also incorporate an overtemperature protection
circuit with hysteresis which switches off the output transistors. In the case of the high-
side switches, the status output is set to low.
Undervoltage-Lockout (UVLO)When VS reaches the switch-on voltage VUVON the IC becomes active with a hysteresis.
The High-Side output transistors are switched off if the supply voltage VS drops below
the switch off value VUVOFF.
Status FlagThe status flag output is an open drain output with Zener-diode which requires a pull-up
resistor, c.f. the application circuit on page14. Various errors as listed in the table
“Diagnosis” are detected by switching the open drain output ST to low. A open load
detection is not available. Freewheeling condition does not cause an error.
Truthtable and Diagnosis (valid only for the High-Side-Switches)Inputs:Outputs:Status:
0 = Logic LOWZ = Output in tristate condition1 = No error
1 = Logic HIGHL = Output in sink condition0 = Error
X = don’t careH = Output in source condition
X = Voltage level undefined
Electrical Characteristics3.1Absolute Maximum Ratings– 40 C < Tj < 150 C
High-Side-Switches (Pins DHVS, IH1,2 and SH1,2)Note:
* internally limited
Status Output ST
Low-Side-Switches (Pins DL1,2, IL1,2 and SL1,2)Note:
* internally limited
Temperatures
Note:Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the integrated circuit.
Note:In the operating range the functions given in the circuit description are fulfilled.
Thermal Resistances (one HS-LS-Path active)
ESD Protection (Human Body Model acc. MIL STD 883D, method 3015.7 and EOS/ESD assn. standard S5.1 - 1993)
3.2Operating Range– 40 C < Tj < 150 C
3.1Absolute Maximum Ratings (cont’d)– 40 C < Tj < 150 C
