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BTS3408GInfineonN/a9100avaiSmart Low Side Switches


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BTS3408G
Smart Low Side Switches
Smart Dual Lowside Power Switch
HITFET
BTS3408G
Data Sheet V1.0
Features
Logic Level InputCompatible to 3V micro controllers ESD protection Thermal shutdown with auto restartOverload protectionShort circuit protectionOver voltage protectionOpen load detection (during Off)Current limitationDirect parallel control of the inputsFREEZE functionality for multiplexingGeneral fault flagVery low standby quiescent currentSwitching frequencies up to 50kHz
Application
All kinds of resistive, inductive and capacitive loads in switching applicationsµC compatible power switch for 12 V, 24 V and 42 V applicationsReplaces electromechanical relays and discrete circuitsLine, stepper motor, lamp and relay driver
General Description

The BTS3408G is a dual channel Low-Side Switch with D-MOS output stages for driving
resistive, capacitive and inductive loads. The design is based on Infineons Smart Power
Technology (SPT) which allows bipolar, CMOS and power D-MOS devices on the same
monolithic circuit.
The BTS3408RS is protected by embedded protection functions and designed for
automotive and industrial applications. It is especially suited for driving stepper motors
and lines.
Figure1Block Diagram
Product Summary
Pin Definitions and Functions
Circuit Description
Logic Supply

The logic is supplied with 4.5 up to 60 Volt by the VS pin. If VS falls below max. 4.5 Volts
the logic is shut down and the output stages are switched off.
Direct Inputs
ENA

The ENA/FREEZE input can be used to enable and/or to freeze the output control of the
IC or to cut off the complete IC.
By pulling the ENA input to low, i.e. applying a Voltage VENAL , the IC is in disable mode.
The power stages are switched off and the current consumption is reduced to IS(stby).
By applying a Voltage VENAFZ , the IC is in FREEZE mode. The output signals will remain
in their former state. All input signals will be ignored.
By pulling the input to high, the IC is in Enable mode. All input signals are output.
The ENA - pin has an internal pull-down.
IN1 / IN2

Each output is independently controlled via the respective input pin. The input pins are
high active. If the common enable pin is high, the individual input signals are output. The
input pins have an internal pull-down.
Table1Functional Table
X = not relevant
Power stages
Each output is protected by embedded protection functions. In the event of an overload
or short to supply, the current is internally limited. The current limit is set to ID(lim). If this
operation leads to an overtemperature condition, a second protection level (about 165
°C) will turn the effected output into a PWM-mode (selective thermal shutdown with
restart) to prevent critical chip temperatures. The temperature hysteresis is typically 10K.
Zener clamping is implemented to limit voltages at the power transistors when inductive
loads are switched off.
Diagnostic

The general FAULT pin is an open drain output. The FAULT pin is low active. It signals
fault conditions of any of the two output stages. By doing so, single and/or dual fault
conditions can be monitored. Single fault conditions can be assigned.
Fault Distinction

Open load / short to ground is recognized during OFF-state. Overtemperature as a result
of an overload or short to battery can only arise during ON-state. If there is only one fault
at a time, it is possible to distinguish which channel is affected with which fault.
Table2Diagnostic Table
X = not relevantselective thermal shutdown for each channel at overtemperature
Absolute Maximum Ratings1)j = -40°C to 150°C , unless otherwise specified
Thermal Resistance
Stresses above those listed here may cause permanent damage to the device. Exposure to absolute maximumDevice on epoxy pcb 40mm × 40mm × 1.5mm with 6cm2 copper area for pin 4 connection.
Electrical CharacteristicsS = 4.5 to 18V; Tj = -40 to 150°C; unless otherwise specified
Power supply
Power outputs
Digital inputs (IN1, IN2, ENA)
Digital Output (FAULT)
Diagnostic Functions
Protection Functions 3)
See also diagram 4 on page 14.See also diagram 5 on page 14.Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
Electrical Characteristics (cont’d)
S = 4.5 to 18V; Tj = -40 to 150°C; unless otherwise specified
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