AH5020CJ ,monolithic analog current switchFeatures
I Interfaces with standard TTL
I "ON" resistance match 2n
I Low "ON" resistance 1 ..
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AH5020CJ
monolithic analog current switch
AH5020C
National
Semiconductor
AH5020C Monolithic Analog
General Description
This versatile dual monolithic JFET analog switch economi-
cally fulfills a wide variety of multiplexing and analog switch-
ing applications.
These switches may be driven directly from standard 5V
logic.
The monolithic construction guarantees tight resistance
match and track.
Features
a Interfaces with standard TTL
" "ON" resistance match 2n
II Low "ON" resistance 150n
l: Very low leakage 50 pA
a Large analog signal range :10V peak
a High switching speed 150 ns
n Excellent isolation between 80 dB
channels at 1 kHz
Current Switch
Applications
u A/D and WA converters
u Micropower converters
n Industrial controllers
II Position controllers
I! Data acquisition
I: Active filters
II Signal multiplexers/demultiplexers
II Multiple channel AGC
a Quad compressors/expanders
u Choppers/demodulators
n Programmable gain amplifiers
" High impedance voltage buffer
" Sample and hold
For voltage switching applications see LF13201, LF13202,
LF13331, LF13332, and LF13333 Analog Switch Family, or
the CMOS Analog Switch Family.
Connection and Schematic Diagrams (All switches shown are for logical "f")
Dual-ln-Llne Package
t.r..ii,s,' sirir"
TL/H15166-1
p Vlew
Order Number AH5020Cd
See NS Package Number J08A
Note: All diode cathodes are Internally connected to the trubatrattr.
TL/Ht5166-2
Absolute Maximum Ratings (Note1)
If MllltarydAerospaett trpeeflttd devices are required,
please contact the National Semiconductor Sales
t9ffltteftNatritttttora for availability and speemeattons.
Drain Current
Power Dissipation
Operating Temp. Range
500 mW
--25'C to +85°C
Inpht.Voltage ' 30V Storage Temperature Range -65''C to + 150°C
Posntnfe Analog Signal Voltage 30V Lead Temp. (Soldering, 10 seconds) 300'C
Negative Analog Signal Voltage --15V
Diode Current 10 mA
Electrical Characteristics (Notes 2 and 3)
Symbols Parameter Condltlons Typ Max Units
kasx Input Current "OFF" VGD = 4.5V, Vsp == 0.7V 0.01 0.1 nA
VGD = 11V, VSD = 0.7V 0.01 0.2 nA
TA --- 85°C,VGD = 11%ng = 0.7V 10 nA
Imopn Leakage Current "OFF" V30 == 0.7V, Vas = 3.8V 0.01 0.2 nA
TA = 85°C 10 nA
'G(ON) Leakage Current "ON" VGD = 0V, IS = 1 mA 0.08 1 nA
TA = 85°C 200 nA
ksioN) Leakage Current "ON" VGD = 0V, IS = 2 mA 0.13 5 nA
TA = 85'C 10 “A
katoro Leakage Current "ON" VGD = ov, ls = -2 mA 0.1 10 mA
TA = 85°C 20 pA
rDStON) Drain-Source Resistance Vas = 0.5V. ks = 2 mA 90 150 ft
TA = +85'C 240 n
VDIODE Forward Diode Drop ID = 0.5 mA 0.8 V
rDs(oN) Match VGS = 0,10 = 1 mA 2 20 n
TON Turn "ON" Time See ac Test Circuit 150 500 ns
TOFF Turn "OFF" Time See ac Test Circuit 300 500 ns
CT Cross Talk See ac Test Circuit 120 dB
Not. 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its sptscltied operating conditions.
Note 2: Test conditions zs-c unless otherwise noted.
N01. & "OFF" and "ON" notation relers to the conduction state of the FET switch.
Note 4: Thermal Resistance:
9.» (Junction to Ambient) .......... NIA
9Jc (Junction to Case) ............. NIA
OOZOSHV
AH5020C
Test Circuits
AC Test Circuit
Wax i1W
s Ms10 pF)
v... tt (our)
- TL/H/5166-4
Switching Time Waveforms
57 tlit 15lf
g=th0J p: i
Cross Talk Test Circuit
- Ham - NONI
v.2 -ttty
- J,,L, ---tttm
TL/H/5166-3
TL/H/5166-5
Typical Performance Characteristics
Parameter Interaction
0 Va: = - b " .-,
mo too
a a = -t M,Vas=DV
iii-i aVns--15V. w=w 2
'i'ii'i'i an |ou E
a g lin 10 2
E to 3
10 1.0
1.0 5 10 100
1htt-tNb800tttlE mow vows: IV)
TL/H/5166-6
"ON" Reslstance, I'DS(ON)
vs Temperature
E In: -I M
g 125 5VT'lL-7
ti ttttl 5v cans
p, / Le,,',.',,---:""'''
, " .7 I
E 50 t511 TTh/ttW-tW cuos
25 35 45 55 65 T5 85
mmmum Ct)
TU/H/5166-8
Leakage Current "
Draln-Gate Voltage
1000 nazs'c
E In: -n.1 an
n 5.0 " " 20 a
nm-GATE vomss oo
TL/H/5166-10
Draln Current vs Bias
Voltage
Vas= --tw
A "" m:
g TA=25'E
o 1.0 " "
tiATE.S0tltttrE voumam
TL/H/SIBG-12
Leakage Current, Imopp)
vs Temperature
lmun—LEAKAGE CURRENT (M)
TEWEMTUHE et)
TL/H/5166-7
Cross Talk, CT vs Frequency
1"Jl v. " * Ttht
CI—CROSSTALK (dB)
IIIIIIIII
" 10k tttot "I
FREOUBiCY (H1)
TL/H/5166-9
Transconductance vs
Drain Current
TA=25°C
Vac: -5V
i=1 tht
TMNSCONDUCI’ANCE (Inmho)
lletttrn---w
1lssorn---7.58
.-tht -t.0 -10
DRAIN CURRENT (ah)
TL/H/5166-11
Normalized Drain Resistance
vs Blas Voltage
ttsom © -IDV. -ttUA
I- via
mu-NORMAUED RESISTANCE (fl)
0 tht OA 0.5 0.8 1.0
Na ntuom l-NDHMALIZED
tWBttM01lME VOUAGE (V)
TL/H/5166-13
OOZOSHV
AHSOZOC
Applications Information
THEORY OF OPERATION
The AH5020 analog switches are primarily intended for op-
eration in current mode switch applications; i.e.. the drains
of the FET switch are held at or near ground by operating
into the summing junction of an operational amplifier. Limit-
ing the drain voltage to under a few hundred millivolts elimi-
nates the need for a special gate driver, allowing the
switches to be driven directly by standard TTL.
It only one of the two switches in each package is used to
apply an input signal to tho input of an op amp, the other
switch FET can be placed in the teedback path in order to
compensate for the "ON" resistance of the switch FET as
shown in Figure h
The closed-loop gain of Figure t is:
_ !y?+_rrositoi2
R1 + rDS(ON)t21
For R1 = R2, gain accuracy is determined by the rDS(ON)
match between 01 and Q2. Typical match between Cl and
02 is 2n resulting in a gain accuracy of 0.02% (for R1 = R2
= 10 kn).
AVCL =
NOISE IMMUNITY
The switches with the source diodes grounded exhibit im-
proved noise immunity for positive analog signals in the
"OFF" state. With V.N --- 15V and the VA = 10V, the
source of 01 is clamped to about 0.7V by the diode Nas =
14.3V) ensuring that ac signals imposed on the 10V input
will not gate the FET "ON".
SELECTION OF GAIN SETTING RESISTORS
Since the AH5020 analog switches are operated in current
mode, it is generally advisable to make the signal current as
large as possible. However, current through the FET switch
tends to forward bias the source to gate junction and the
signal shunting diode resulting in leakage through these
junctions. As shown in Figure 2, kuoro represents a finite
error in the current reaching the summing junction of the op
Secondly, the rDs(0N) of the FET begins to "round" as Is
approaches loss. A practical rule of thumb is to maintain Is
at less than lho of loss.
Combining the criteria from the above discussion yields:
H1(MIN) 2 'ttee'-'-'-' (2a)
tt VA(MAX) (2b)
IDSS/ 10
whichever is larger.
COMMUTE”!
in same: + itt
v. tot man i s' "
--MP. I - f; IN
mm . 01 1
L ANALOG
OUTPUT
"1" lhtt -
= "o" _n_ F
- TL/H/5166-d4
FIGURE 1. Use of Compensation FET
'ts-Ms-l-y b
Li. 4.r - i'"
TL/H/5t66-15
FIGURE 2. On Leakage Current, Iatoro
Applications Information (Continued)
Where VNMAX) = Peak amplitude of the analog input
signal
AD = Desired accuracy
[G(ON) == Leakage at a given Is
loss = Saturation current of the FET switch
In a typical application, VA might = i 10V, AD =0.1%, 0°C
s TA s 85°C. The criterion of equation (2b) predicts:
RI it 10V
(MIN) 20mA
For R1 = 5k, Is ' 10V/5k or 2 mA. The electrical charac-
teristics guarantee an IG(0N) s 1 pA at 85''C for the
AH5020. Per the criterion of equation (2a):
(10V)(10-3)
1 M 10-6
Since equation (2a) predicts a higher value, the 10k resistor
should be used.
The "OFF" condition of the FET also affects gain accuracy.
As shown in Figure 3, the leakage across 02, ImopF) repre-
sents a finite error in the current arriving at the summing
junction of the op amp.
R1(M|N) 2 2 10 kfl
Inulg-o-lmnm
Accordingly:
VA MIN AD
RI M S ._(_)_
( AX) (N) |D(0FF)
Where VMMIN) = Minimum value for the analog input sig-
AD = Desired accuracy
N Number of channels
ID(OFF) == "OFF" leakage of a given FET switch
As an example, if N=10, AD=0.1°/o, and 'D(OFF) S 10 nA
at 85°C for the AH5020. R1(MAX) is:
(1V)(10‘3)
R1 s; ------r--
(MAX) (10)(10 x 10-9)
Selection of R2, of course. depends on the gain desired and
for unity gain R1 = R2.
Lastly, the foregoing discussion has ignored resistor toler-
ances, input bias current and offset voltage of the op
amp-all of which should be considered in setting the
overall gain accuracy of the circuit.
v M - tht
m - g',
TL/H/5166-t6
FIGURE 3. Off Leakage Current, 'D(0FF)
OOZOSHV
AHSOZOC
Applications Information (Continued)
TTL COMPATIBILITY
Standard TTL gates pull-up to about 3.5V (no load). In order
to ensure turn-off of the AH5020, a pull-up resistor. REXT of
at Ieast 10 kn should be placed between the 5V Vcc and the
gate output as shown in Figure 4.
DEFINITION OF TERMS
The terms referred to in the electrical characteristics tables
are as defined in Figure 5.
t" "l 58 A
l I 10k ' ,
I ft" I
I I I , r-nfl,',',',','
:3? I I
l Locus "a"
I I I Im(v.)
“12% - d,'.",, d.'
TL/HI5186-17
FIGURE 4. Interfaclng with + 5V TTL
rttsttuytnttmtATitlq
sans; mm
ELEMau II I s 1
31 it i la a /
----- ---e "
"ii', l
man" I.
TI" TL/H15166-18
FIGURE 5. Deflrtltlon of Terms
Typical Applications
Deglltched Switch for Nolseless Audlo Swltchlng
r.-.“—
1/21H5020
m: WHCALLY
1 mt-IO ms
U351 '--thlr
Galn Programmable Ampoer
TLfH/5166-1g
Cttttrtttthtrtatittat%tlrt = ’four = Rps
TLfH/5t66-20
OOZOSHV
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Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
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This file is the datasheet for the following electronic components:
AH5020CJ - product/ah50200j?HQS=T|-nu|l-null-dscatalog-df-pf-null-wwe
