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AFEDRI8201PFBRTIN/a5000avaiIF Sampling Front End for AM/FM/HD Radio Compatible with TI DRIx50 Digital Baseband Processors


AFEDRI8201PFBR ,IF Sampling Front End for AM/FM/HD Radio Compatible with TI DRIx50 Digital Baseband ProcessorsSBWS017F − SEPTEMBER 2003 − REVISED AUGUST 2005AUXILIARY DAC CHARACTERISTICS All specifications a ..
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AFEDRI8201PFBR
IF Sampling Front End for AM/FM/HD Radio Compatible with TI DRIx50 Digital Baseband Processors
FEATURES Interfaces To Texas Instruments DRIx50 HD
Radio Baseband Processors
12-Bit, 80MSPS ADC Reduces Noise and
Improves Sensitivity
Typical SNR of 102dB in 3kHz Bandwidth Programmable Input Range For Optimum
Tuner Dynamic Range
Integrated Digital Downconverter (DDC)
− Quadrature Mixer, NCO, CIC Decimation
Filter, And FIR Filters
Mixer: 32-Bit Frequency and Phase Decimation Ratio: 32 to 4096 User-Programmable FIR Filters with 16-Bit
Coefficients
12-Bit Auxiliary DAC Code Composer Module for Easy Software
Generation
SPI Control Interface
APPLICATIONS
AM/FM and HD Radio Receivers IF Receive Channels Software Radios Narrowband Receivers
DESCRIPTION

The AFEDRI8201 implements the receive channel analog
functions required for intermediate-frequency (IF)
sampled AM/FM and HD digital radio receivers. It is
designed to be used with TI’s DRIx50 digital baseband
processor. The AFEDRI8201 is programmed by the
DRIx50 for use in AM/FM and HD radio. The AFEDRI8201
oversamples the radio tuner IF output at speeds of up to
80MHz to reduce noise and improve dynamic range. The
radio tuner output IF is typically 10.7MHz for AM or FM as
well as 450kHz or 455kHz for AM, as desired. The
AFEDRI8201 then mixes, filters, and decimates the signal
to provide baseband I and Q output signals to the digital
baseband processor. The AFEDRI8201 also includes a
general-purpose 12-bit control digital-to-analog converter
(DAC) to provide a gain control signal or other analog
feedback to the tuner.
The DRIx50 digital baseband device writes control register
data as well as decimation filter coefficients to the
AFEDRI8201 through the industry-standard SPI control
interface. The baseband output signals are transported to
the DRIx50 through a general-purpose, high-speed serial
interface (TI’s Buffered Serial Ports, McBSP).
This unit uses 3.3V analog and 1.8V digital power
supplies. Typical power dissipation is 490mW. The digital
I/O lines can be powered by a 3.3V supply.
AUX
IFM
IFP
DOUT0
DOUT1
DFSO
DCLK
DIN
DFSI
REFM VCM REFP VGB
SCK MOSI MISO CS
PWD SYNC RESET
MCLK MCLKB
AFEDRI8201

SBWS017F − SEPTEMBER 2003 − REVISED AUGUST 2005
IF ADC Front End for AM/FM and HD Radios
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