ADV7330KST Fast Delivery |IC PHOENIX CO.,LIMITED

ADV7330KST ,Multiformat 11-Bit Triple DAC Video EncoderCHARACTERISTICS . . . . . . . . . . . . . . . . . . 11 Border Area . . . . . . . . . . . . . . . . ..
ADV7342BSTZ , Multiformat Video Encoder Six, 11-Bit, 297 MHz DACs
ADV7344BSTZ , Multiformat Video Encoder Six 14-Bit Noise Shaped Video DACs
ADV7391BCPZ , Low Power, Chip Scale 10-Bit SD/HD Video Encoder
ADV7393BCPZ-REEL , Low Power, Chip Scale 10-Bit SD/HD Video Encoder
ADV7400A-KSTZ-110 ,10-Bit Intergrated Multiformat SDTV/HDTV Video Decoder and RGB Graphics DigitizerWuan-eDem. ANALOG DEVICES IO-Bit, Integrated, Multitormat SDTV/HDTV Video Decoder and Ilil8 ..
AM27S03APC , 64-Bit Inverting-Output Bipolar RAM
AM27S03PC , 64-Bit Inverting-Output Bipolar RAM
AM27S07APC , 64-Bit Inverting-Output Bipolar RAM
AM27S07DC , 64-Bit Inverting-Output Bipolar RAM
AM27S181A , 8,192-BIT (1024 X 8) BIPOLAR PROM
AM27S23APC , 2048-BIT (256X8) BIPOLAR PROM

ADV7330KST
Multiformat 11-Bit Triple DAC Video Encoder
REV.B
Multiformat 11-Bit
Triple DAC Video Encoder
Purchase of licensed I2C components of Analog Devices or one of its
sublicensed Associated Companies conveys a license for the purchaser under
the Philips I2C Patent Rights to use these components in an I2C system,
provided that the system conforms to the I2C Standard Specification as
defined by Philips.
SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM
FEATURES
High Definition Input Formats
8-Bit or 16-Bit (4:2:2) Parallel YCrCb Compliant with:
SMPTE 293M (525p)
BTA T-1004 EDTV2 525p
ITU-R BT.1358 (525p/625p)
ITU-R BT.1362 (525p/625p)
SMPTE 274M (1080i) at 30 Hz and 25 Hz
SMPTE 296M (720p)
Other High Definition Formats Using Async
Timing Mode
High Definition Output Formats
YPrPb Progressive Scan (EIA-770.1, EIA-770.2)
YPrPb HDTV (EIA 770.3)
RGB, RGBHV
CGMS-A (720p/1080i)
Macrovision® Rev 1.1 (525p/625p)
CGMS-A (525p)
Standard Definition Input Formats
CCIR-656 4:2:2 8-Bit or 16-Bit Parallel Input
Standard Definition Output Formats
Composite NTSC M/N
Composite PAL M/N/B/D/G/H/I, PAL-60
SMPTE 170M NTSC Compatible Composite Video
ITU-R BT.470 PAL Compatible Composite Video
S-Video (Y/C)
EuroScart RGB
Component YPrPb (Betacam, MII, SMPTE/EBU N10)
Macrovision Rev 7.1.L1
CGMS/WSS
Closed Captioning
GENERAL FEATURES
Programmable DAC Gain Control
Sync Outputs in All Modes
On-Board Voltage Reference
Three 11-Bit Precision Video DACs
2-Wire Serial I2C® Interface, Open Drain Configuration
Dual I/O Supply 2.5 V/3.3 V Operation
Analog and Digital Supply 2.5 V
On-Board PLL
64-Lead LQFP Package
Lead (Pb) Free Product
APPLICATIONS
SD/PS DVD Recorders/Players
SD/Prog Scan/HDTV Display Devices
SD/HDTV Set Top Boxes
GENERAL DESCRIPTION
The ADV®7330 is a high speed, digital-to-analog encoder on a
single monolithic chip. It includes three high speed video D/A
converters with TTL compatible inputs.
The ADV7330 has separate 8-bit or 16-bit input ports that
accept data in high definition or standard definition video
format. For all standards, external horizontal, vertical, and
blanking signals or EAV/SAV timing codes control the inser-
tion of appropriate synchronization signals into the digital
data stream and therefore the output signal.
ADV7330
DETAILED FEATURES
High Definition Programmable Features (720p/1080i)
2� Oversampling (148.5 MHz)
Internal Test Pattern Generator
(Color Hatch, Black Bar, Flat Field/Frame)
Fully Programmable YCrCb to RGB Matrix
Gamma Correction
Programmable Adaptive Filter Control
Programmable Sharpness Filter Control
CGMS-A (720p/1080i)
Programmable Features (525p/625p)
8� Oversampling
Internal Test Pattern Generator
(Color Hatch, Black Bar, Flat Frame)
Individual Y and PrPb Output Delay
Gamma Correction
Programmable Adaptive Filter Control
Fully Programmable YCrCb to RGB/Matrix
Undershoot Limiter
Macrovision Rev 1.1 (525p/625p)
CGMS-A (525p)
Standard Definition Programmable Features
16� Oversampling
Internal Test Pattern Generator
(Colorbars, Black Bar)
Controlled Edge Rates for Sync, Active Video
Individual Y and PrPb Output Delay
Gamma Correction
Digital Noise Reduction (DNR)
Multiple Chroma and Luma Filters
Luma-SSAF™ Filter with Programmable
Gain/Attenuation
PrPb SSAF™
Separate Pedestal Control on Component and
Composite/S-Video Outputs
VCR FF/RW Sync Mode
Macrovision Rev 7.1.L1
CGMS/WSS
Closed Captioning
Standards Directly Supported
Other standards are supported in Async Timing Mode.
*SMPTE 274M-1998: System No. 6
DETAILED FUNCTIONAL BLOCK DIAGRAM
TABLE OF CONTENTS
FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
GENERAL FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
APPLICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM . . . . . .1
GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . 1
DETAILED FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . .2
DETAILED FUNCTIONAL BLOCK DIAGRAM . . . . . . .2
SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
DYNAMIC SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . .5
TIMING SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . .6
ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . 11
THERMAL CHARACTERISTICS . . . . . . . . . . . . . . . . . .11
ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PIN CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . . . .12
PIN FUNCTION DESCRIPTIONS . . . . . . . . . . . . . . . . . 12
MPU PORT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . 13
REGISTER ACCESS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Register Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Subaddress Register (SR7–SR0) . . . . . . . . . . . . . . . . . . . 14
INPUT CONFIGURATION . . . . . . . . . . . . . . . . . . . . . . . 27
Standard Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Progressive Scan or HDTV Mode . . . . . . . . . . . . . . . . . . 27
Progressive Scan at 27 MHz (Dual Edge) or 54 MHz . . .27
OUTPUT CONFIGURATION . . . . . . . . . . . . . . . . . . . . .28
TIMING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
HD Async Timing Mode . . . . . . . . . . . . . . . . . . . . . . . . .29
HD Timing Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
SD Real-Time Control, Subcarrier Reset, Timing Reset .31
Reset Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
SD VCR FF/RW Sync . . . . . . . . . . . . . . . . . . . . . . . . . . .32
Vertical Blanking Interval . . . . . . . . . . . . . . . . . . . . . . . . .33
SD Subcarrier Frequency Registers . . . . . . . . . . . . . . . . .33
Square Pixel Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
FILTER SECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
HD Sinc Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
SD Internal Filter Response . . . . . . . . . . . . . . . . . . . . . . .35
Typical Performance Characteristics . . . . . . . . . . . . . . . . . .36
COLOR CONTROLS AND RGB MATRIX . . . . . . . . . . .40
HD Y Level, Cr Level, Cb Level . . . . . . . . . . . . . . . . . . .40
HD RGB Matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
SD Luma and Color Control . . . . . . . . . . . . . . . . . . . . . .40
SD Hue Adjust Value . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
SD Brightness Control . . . . . . . . . . . . . . . . . . . . . . . . . . .41
SD Brightness Detect . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
Double Buffering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41
PROGRAMMABLE DAC GAIN CONTROL . . . . . . . . . .42
Gamma Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43
HD SHARPNESS FILTER CONTROL AND
ADAPTIVE FILTER CONTROL . . . . . . . . . . . . . . . . . . .44
HD Sharpness Filter Mode . . . . . . . . . . . . . . . . . . . . . . .44
HD Adaptive Filter Mode . . . . . . . . . . . . . . . . . . . . . . . .44
HD Sharpness Filter and Adaptive Filter Application
Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
ADAPTIVE FILTER CONTROL APPLICATION . . . . . .46
SD Digital Noise Reduction . . . . . . . . . . . . . . . . . . . . . . .47
Coring Gain Border . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47
Coring Gain Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47
DNR Threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47
Border Area . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47
Block Size Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
DNR Input Select Control . . . . . . . . . . . . . . . . . . . . . . . .48
DNR Mode Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
Block Offset Control . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
SD ACTIVE VIDEO EDGE . . . . . . . . . . . . . . . . . . . . . . . .48
SAV/EAV STEP EDGE CONTROL . . . . . . . . . . . . . . . . .48
BOARD DESIGN AND LAYOUT CONSIDERATIONS .50
DAC Termination and Layout Considerations . . . . . . . .50
VIDEO OUTPUT BUFFER AND OPTIONAL
OUTPUT FILTER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50
PC BOARD LAYOUT CONSIDERATIONS . . . . . . . . . .51
Supply Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51
Digital Signal Interconnect . . . . . . . . . . . . . . . . . . . . . . .52
Analog Signal Interconnect . . . . . . . . . . . . . . . . . . . . . . .52
APPENDIX 1—COPY GENERATION
MANAGEMENT SYSTEM . . . . . . . . . . . . . . . . . . . . . .53
HD CGMS Data Registers 2–0 . . . . . . . . . . . . . . . . . . . .53
SD CGMS Data Registers 2–0 . . . . . . . . . . . . . . . . . . . . .53
HD CGMS Data Registers . . . . . . . . . . . . . . . . . . . . . . .53
Function of CGMS Bits . . . . . . . . . . . . . . . . . . . . . . . . . .53
APPENDIX 2—SD WIDE SCREEN SIGNALING . . . . . .55
APPENDIX 3—SD CLOSED CAPTIONING . . . . . . . . . .56
APPENDIX 4—TEST PATTERNS . . . . . . . . . . . . . . . . . .57
APPENDIX 5—SD TIMING MODES . . . . . . . . . . . . . . .60
Mode 0 (CCIR-656)—Slave Option . . . . . . . . . . . . . . . .60
Mode 0 (CCIR-656)—Master Option . . . . . . . . . . . . . . .61
Mode 1—Slave Option . . . . . . . . . . . . . . . . . . . . . . . . . . .62
Mode 1—Master Option . . . . . . . . . . . . . . . . . . . . . . . . .63
Mode 2—Slave Option . . . . . . . . . . . . . . . . . . . . . . . . . . .64
Mode 2—Master Option . . . . . . . . . . . . . . . . . . . . . . . . .65
Mode 3—Master/Slave Option . . . . . . . . . . . . . . . . . . . . .66
APPENDIX 6—HD TIMING . . . . . . . . . . . . . . . . . . . . . .67
APPENDIX 7—VIDEO OUTPUT LEVELS . . . . . . . . . . .68
HD YPrPb Output Levels . . . . . . . . . . . . . . . . . . . . . . . .68
RGB Output Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69
YPrPb Output Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . .70
APPENDIX 8—VIDEO STANDARDS . . . . . . . . . . . . . . .74
OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . .76
ADV7330–SPECIFICATIONS
NOTESOversampling disabled. Static DAC performance will be improved with increased oversampling ratios.DNL measures the deviation of the actual DAC output voltage step from the ideal. For +ve DNL, the actual step value lies above the ideal step value; for –ve DNL,
the actual step value lies below the ideal step value.Value in brackets for VDD_IO = 2.375 V to 2.75 V.External current required to overdrive internal VREF.IDD, the circuit current, is the continuous current required to drive the digital core.Guaranteed maximum by characterization.IAA is the total current required to supply all DACs including the VREF circuitry and the PLL circuitry.All DACs on.
Specifications subject to change without notice.
(VAA = 2.375 V to 2.625 V, VDD = 2.375 V to 2.625 V; VDD_IO = 2.375 V to 3.6 V,
VREF = 1.235 V, RSET = 3040 �, RLOAD = 300 �. All specifications TMIN to TMAX
(0�C to 70�C), unless otherwise noted.)
ADV7330
DYNAMIC SPECIFICATIONS
HDTV MODE
Specifications subject to change without notice.
(VAA = 2.375 V to 2.625 V, VDD = 2.375 V to 2.625 V; VDD_IO = 2.375 V to 3.6 V, VREF = 1.235 V,
RSET = 3040 �, RLOAD = 300 �. All specifications TMIN to TMAX (0�C to 70�C), unless otherwise noted.)

Partno	Mfg	Dc	Qty	Available	Descript
ADV7330KST	AD	N/a	42	avai	Multiformat 11-Bit Triple DAC Video Encoder