ADV7189BBSTZ ,High Performance 12-bit Video Decoder with Noise Shaped Video® ADCsSpecifications . 8 Pixel Port Configuration 59 Timing Diagrams.. 8 MPU Port Description.... 60 Abs ..
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ADV7189KST ,High Performance 12-bit Video Decoder with Noise Shaped Video® ADCsSpecifications . 8 SDP Comb Filters........ 37 Timing Diagrams.. 9 SDP AV Code Insertion and Contro ..
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AM27C64-55DC , 64 Kilobit (8 K x 8-Bit) CMOS EPROM
AM27C64-55DI , 64 Kilobit (8 K x 8-Bit) CMOS EPROM
AM27C64-70DC , 64 Kilobit (8 K x 8-Bit) CMOS EPROM
AM27C64-70DE , 64 Kilobit (8 K x 8-Bit) CMOS EPROM
AM27C64-70DI , 64 Kilobit (8 K x 8-Bit) CMOS EPROM
AM27C64-90DC , 64 Kilobit (8 K x 8-Bit) CMOS EPROM
ADV7189BBSTZ
High Performance 12-bit Video Decoder with Noise Shaped Video® ADCs
Multiformat SDTV Video DecoderRev. 0
FEATURES
Multiformat video decoder supports NTSC-(J, M, 4.43),
PAL-(B/D/G/H/I/M/N), SECAM
Integrates three 54 MHz, Noise Shaped Video®, 12-bit ADCs
Clocked from a single 27 MHz crystal
Line-locked clock-compatible (LLC)
Adaptive-Digital-Line-Length-Tracking (ADLLT™), signal
processing, and enhanced FIFO management give mini
TBC functionality
5-line adaptive comb filters
Proprietary architecture for locking to weak, noisy, and
unstable video sources such as VCRs and tuners
Subcarrier frequency lock and status information output
Integrated AGC with adaptive peak white mode
Macrovision® copy protection detection
CTI (chroma transient improvement)
DNR (digital noise reduction)
Multiple programmable analog input formats:
CVBS (composite video)
S-Video (Y/C)
YPrPb component (VESA, MII, SMPTE, and BetaCam)
12 analog video input channels
Automatic NTSC/PAL/SECAM identification
Digital output formats (8-bit/10-bit/16-bit/20-bit):
ITU-R BT.656 YCrCb 4:2:2 output + HS, VS, and FIELD
0.5 V to 1.6 V analog signal input range
Differential gain: 0.4% typ
Differential phase: 0.4° typ
Programmable video controls:
Peak white/hue/brightness/saturation/contrast
Integrated on-chip video timing generator
Free-run mode (generates stable video ouput with no I/P)
VBI decode support for close captioning, WSS, CGMS, EDTV,
Gemstar® 1×/2×
Power-down mode
2-wire serial MPU interface (I2C®-compatible)
3.3 V analog, 1.8 V digital core; 3.3 V IO supply
2 temperature grades: –25°C to +70°C and –40°C to +85°C
80-lead LQFP Pb-free package
APPLICATIONS
High end DVD recorders
Video projectors
HDD-based PVRs/DVDRs
LCD TVs
Set-top boxes
Professional video products
AVR receiver
GENERAL DESCRIPTION The ADV7189B integrated video decoder automatically detects
and converts a standard analog baseband television signal-
compatible with worldwide standards NTSC, PAL, and SECAM
into 4:2:2 component video data-compatible with 20-/16-/10-/
8-bit CCIR601/CCIR656.
The advanced and highly flexible digital output interface
enables performance video decoding and conversion in line-
locked clock based systems. This makes the device ideally suited
for a broad range of applications with diverse analog video
characteristics, including tape based sources, broadcast sources,
security/surveillance cameras, and professional systems.
The 12-bit accurate A/D conversion provides professional
quality video performance and is unmatched. This allows true
10-bit resolution in the 10-bit output mode.
The 12 analog input channels accept standard Composite,
S-Video, YPrPb video signals in an extensive number of
combinations. AGC and clamp restore circuitry allow an input
video signal peak-to-peak range of 0.5 V to 1.6 V. Alternatively,
these can be bypassed for manual settings.
The fixed 54 MHz clocking of the ADCs and datapath for all
modes allows very precise, accurate sampling and digital
filtering. The line-locked clock output allows the output data
rate, timing signals, and output clock signals to be synchronous,
asynchronous, or line locked even with ±5% line length variation.
The output control signals allow glueless interface connections
in almost any application. The ADV7189B modes are set up
over a 2-wire, serial, bidirectional port (I2C-compatible).
The ADV7189B is fabricated in a 3.3 V CMOS process. Its
monolithic CMOS construction ensures greater functionality
with lower power dissipation.
The ADV7189B is packaged in a small 80-lead LQFP Pb-free
package.
TABLE OF CONTENTS Introduction......................................................................................3
Analog Front End.........................................................................3
Standard Definition Processor...................................................3
Functional Block Diagram..............................................................4
Specifications.....................................................................................5
Electrical Characteristics.............................................................5
Video Specifications.....................................................................6
Timing Specifications..................................................................7
Analog Specifications...................................................................7
Thermal Specifications................................................................8
Timing Diagrams..........................................................................8
Absolute Maximum Ratings............................................................9
ESD Caution..................................................................................9
Pin Configuration and Function Descriptions...........................10
Analog Front End...........................................................................12
Analog Input Muxing................................................................12
Global Control Registers...............................................................15
Power-Save Modes......................................................................15
Reset Control..............................................................................15
Global Pin Control.....................................................................16
Global Status Registers...................................................................18
Identification...............................................................................18
Status 1.........................................................................................18
SD Autodetection Result...........................................................18
Status 2.........................................................................................18
Status 3.........................................................................................19
Standard Definition Processor (SDP)..........................................20
SD Luma Path.............................................................................20
SD Chroma Path.........................................................................20
Sync Processing...........................................................................21
VBI Data Recovery.....................................................................21
General Setup..............................................................................21
SD Color Controls......................................................................23
Clamp Operation........................................................................25
Luma Filter..................................................................................26
Chroma Filter..............................................................................29
Gain Operation...........................................................................30
Chroma Transient Improvement (CTI)..................................33
Digital Noise Reduction (DNR)...............................................34
Comb Filters................................................................................35
AV Code Insertion and Controls.............................................37
Synchronization Output Signals...............................................39
Sync Processing..........................................................................46
VBI Data Decode.......................................................................47
Pixel Port Configuration...............................................................59
MPU Port Description...................................................................60
Register Accesses........................................................................61
Register Programming...............................................................61 2C Sequencer..............................................................................61 2C Register Maps...........................................................................62 2PC Register Map Details...........................................................67 2PC Interrupt Register Map.......................................................68 2C Programming Examples..........................................................90
Mode 1 CVBS Input (Composite Video on AIN5)................90
Mode 2 S-Video Input (Y on AIN1 and C on AIN4)............90
Mode 3 YPrPb Input 525i/625i (Y on AIN2, Pr on AIN3, and
Pb on AIN6)................................................................................91
Mode 4 CVBS Tuner Input PAL Only on AIN4....................91
PCB Layout Recommendations....................................................92
Analog Interface Inputs.............................................................92
Power Supply Decoupling.........................................................92
PLL...............................................................................................92
Digital Outputs (Both Data and Clocks)................................92
Digital Inputs..............................................................................93
Antialiasing Filters.....................................................................93
Typical Circuit Connection...........................................................94
Outline Dimensions.......................................................................96
Ordering Guide..........................................................................96
INTRODUCTION The ADV7189B is a high quality, single chip, multiformat video
decoder that automatically detects and converts PAL, NTSC,
and SECAM standards in the form of composite, S-Video, and
component video into a digital ITU-R BT.656 format.
The advanced and highly flexible digital output interface enables
performance video decoding and conversion in line-locked
clock based systems. This makes the device ideally suited for a
broad range of applications with diverse analog video charact-
eristics, including tape based sources, broadcast sources, security/
surveillance cameras, and professional systems.
ANALOG FRONT END The ADV7189B analog front end comprises three 12-bit Noise
Shaped Video ADCs that digitize the analog video signal before
applying it to the standard definition processor. The analog
front end employs differential channels to each ADC to ensure
high performance in mixed-signal applications.
The front end also includes a 12-channel input mux that enables
multiple video signals to be applied to the ADV7189B. Current
and voltage clamps are positioned in front of each ADC to
ensure that the video signal remains within the range of the
converter. Fine clamping of the video signals is performed
downstream by digital fine clamping within the ADV7189B.
The ADCs are configured to run in 4× oversampling mode.
STANDARD DEFINITION PROCESSOR The ADV7189B is capable of decoding a large selection of
baseband video signals in composite, S-Video, and component
formats. The video standards supported by the ADV7189B
include PAL B/D/I/G/H, PAL60, PAL M, PAL N, PAL Nc, NTSC
M/J, NTSC 4.43, and SECAM B/D/G/K/L. The ADV7189B can
automatically detect the video standard and process it accord-
ingly. The ADV7189B has a 5-line, superadaptive, 2D comb
filter that gives superior chrominance and luminance separation
when decoding a composite video signal. This highly adaptive
filter automatically adjusts its processing mode according to
video standard and signal quality with no user intervention
required. Video user controls such as brightness, contrast,
saturation, and hue are also available within the ADV7189B.
The ADV7189B implements a patented adaptive-digital-line-
length-tracking (ADLLT) algorithm to track varying video line
lengths from sources such as a VCR. ADLLT enables the
ADV7189B to track and decode poor quality video sources such
as VCRs, noisy sources from tuner outputs, VCD players, and
camcorders. The ADV7189B contains a chroma transient
improvement (CTI) processor that sharpens the edge rate of
chroma transitions, resulting in sharper vertical transitions.
The ADV7189B can process a variety of VBI data services, such
as closed captioning (CC), wide screen signaling (WSS), copy
generation management system (CGMS), EDTV, Gemstar 1×/2×,
and extended data service (XDS). The ADV7189B is fully
Macrovision-certified; detection circuitry enables Type I, II, and
III protection levels to be identified and reported to the user.
The decoder is also fully robust to all Macrovision signal inputs.
FUNCTIONAL BLOCK DIAGRAM
IN1
ALS
CONTROLAND DATAS
CLK CONTROL
PIXELDATAFIELDLLC1LLC2SFL
VID
YPrPb
SPECIFICATIONS Temperature range: TMIN to TMAX, –40°C to +85°C. The min/max specifications are guaranteed over this range.
ELECTRICAL CHARACTERISTICS At AVDD = 3.15 V to 3.45 V, DVDD = 1.65 V to 2.0 V, DVDDIO = 3.0 V to 3.6 V, PVDD = 1.65 V to 2.0 V (operating temperature range, unless
otherwise noted).
Table 1. 1 Pins 36 and 79. Pins 1, 2, 5, 6, 7, 8, 12, 17, 18, 19, 20, 21, 22, 23, 24, 32, 33, 34, 35, 73, 74, 75, 76, and 80.
3 Guaranteed by characterization. ADC1 powered on.
5 All three ADCs powered on.
