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ADV7125JST240ADIN/a2avaiCMOS, 330 MHz Triple 8-Bit High Speed Video DAC
ADV7125KST140ADN/a23avaiCMOS, 330 MHz Triple 8-Bit High Speed Video DAC
ADV7125KST50ADIN/a265avaiCMOS, 330 MHz Triple 8-Bit High Speed Video DAC
ADV7125KST50AD N/a3avaiCMOS, 330 MHz Triple 8-Bit High Speed Video DAC
ADV7125KST-50 |ADV7125KST50ADN/a375avaiCMOS, 330 MHz Triple 8-Bit High Speed Video DAC


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ADV7125KSTZ140 , CMOS, 330 MHz Triple 8-Bit High Speed Video DAC
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AM27C4096-150DE , 4 Megabit (256 K x 16-Bit) CMOS EPROM
AM27C4096-150DI , 4 Megabit (256 K x 16-Bit) CMOS EPROM
AM27C4096-200DC , 4 Megabit (256 K x 16-Bit) CMOS EPROM
AM27C4096-200DE , 4 Megabit (256 K x 16-Bit) CMOS EPROM
AM27C4096-255DC , 4 Megabit (256 K x 16-Bit) CMOS EPROM
AM27C4096-255DI , 4 Megabit (256 K x 16-Bit) CMOS EPROM


ADV7125JST240-ADV7125KST140-ADV7125KST50-ADV7125KST-50
CMOS, 330 MHz Triple 8-Bit High Speed Video DAC
REV.0
CMOS, 330 MHz
Triple 8-Bit High Speed Video DAC
a
ADV is a registered trademark of Analog Devices, Inc.
FEATURES
330 MSPS Throughput Rate
Triple 8-Bit DACs
RS-343A/RS-170 Compatible Output
Complementary Outputs
DAC Output Current Range 2 to 26 mA
TTL Compatible Inputs
Internal Reference (1.23 V)
Single-Supply 5 V/3.3 V Operation
48-Lead LQFP Package
Low Power Dissipation (30 mW Min @ 3 V)
Low Power Standby Mode (6 mW Typ @ 3 V)
Industrial Temperature Range (–40°C to +85°C)
APPLICATIONS
Digital Video Systems
High Resolution Color Graphics
Digital Radio Modulation
Image Processing
Instrumentation
Video Signal Reconstruction
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION

The ADV®7125 is a triple high speed, digital-to-analog converter
on a single monolithic chip. It consists of three high speed, 8-bit
video DACs with complementary outputs, a standard TTL input
interface, and a high impedance, analog output current source.
The ADV7125 has three separate 8-bit-wide input ports. A single
5 V/3.3 V power supply and clock are all that are required to make
the part functional. The ADV7125 has additional video control
signals, composite SYNC and BLANK, as well as a power-
save mode.
The ADV7125 is fabricated in a 5 V CMOS process. Its mono-
lithic CMOS construction ensures greater functionality with
lower power dissipation. The ADV7125 is available in a 48-lead
LQFP package.
PRODUCT HIGHLIGHTS
330 MSPS (3.3 V only) throughputGuaranteed monotonic to eight bitsCompatible with a wide variety of high resolution color
graphics systems, including RS-343A and RS-170
ADV7125–SPECIFICATIONS
(VAA = 5 V ± 5%, VREF = 1.235 V, RSET = 560 �, CL = 10 pF. All specifications TMIN to
TMAX1, unless otherwise noted, TJ MAX = 110�C.)

VOLTAGE REFERENCE (Ext. and Int.)
POWER DISSIPATION
NOTES
1Temperature range TMIN to TMAX: –40°C to +85°C at 50 MHz and 140 MHz, 0°C to +70°C at 240 MHz and 330 MHz.
2Gain error = (Measured (FSC)/Ideal (FSC) –1) × 100), where Ideal = VREF/RSET × K × (FFH) × 4 and K = 7.9896.
3Digital supply is measured with continuous clock with data input corresponding to a ramp pattern and with an input level at 0 V and VDD.
4These max/min specifications are guaranteed by characterization in the 4.75 V to 5.25 V range.
Specifications subject to change without notice.
5 V ELECTRICAL CHARACTERISTICS
ADV7125
3.3 V ELECTRICAL CHARACTERISTICS1

DIGITAL AND CONTROL INPUTS
VOLTAGE REFERENCE (Int.)
NOTESThese max/min specifications are guaranteed by characterization in the 3.0 V to 3.6 V range.Temperature range TMIN to TMAX: –40°C to +85°C at 50 MHz and 140 MHz, 0°C to +70°C at 240 MHz and 330 MHz.Gain error = (Measured (FSC)/Ideal (FSC) –1) × 100), where Ideal = VREF/RSET × K × (FFH) × 4 and K = 7.9896.Digital supply is measured with continuous clock with data input corresponding to a ramp pattern and with an input level at 0 V and VDD.
Specifications subject to change without notice.
(VAA = 3.0 V to 3.6 V, VREF = 1.235 V, RSET = 560 �, CL = 10 pF. All specifications
TMIN to TMAX2, unless otherwise noted, TJ MAX = 110�C.)
ADV7125
5 V TIMING SPECIFICATIONS1(VAA = 5 V ± 5%2, VREF = 1.235 V, RSET = 560 �, CL = 10 pF. All specifications TMIN to TMAX3,
unless otherwise noted, TJ MAX = 110�C.)

NOTESTiming specifications are measured with input levels of 3.0 V (VIH) and 0 V (VIL) for both 5 V and 3.3 V supplies.These maximum and minimum specifications are guaranteed over this range.Temperature range TMIN to TMAX: –40°C to +85°C at 50 MHz and 140 MHz, 0°C to +70°C at 240 MHz.Rise time was measured from the 10% to 90% point of zero to full-scale transition, fall time from the 90% to 10% point of a full-scale transition.Measured from 50% point of full-scale transition to 2% of final value.Guaranteed by characterization.fCLK max specification production tested at 125 MHz and 5 V. Limits specified here are guaranteed by characterization.
Specifications subject to change without notice.
ADV7125
3.3 V TIMING SPECIFICATIONS1(VAA = 3.0 V to 3.6 V2, VREF = 1.235 V, RSET = 560 �, CL = 10 pF. All specifications TMIN
to TMAX3, unless otherwise noted, TJ MAX = 110�C.)

NOTESTiming specifications are measured with input levels of 3.0 V (VIH) and 0 V (VIL) for 3.3 V supplies.These maximum and minimum specifications are guaranteed over this range.Temperature range: TMIN to TMAX: –40°C to +85°C at 50 MHz and 140 MHz, 0°C to +70°C at 240 MHz and 330 MHz.Rise time was measured from the 10% to 90% point of zero to full-scale transition, fall time from the 90% to 10% point of a full-scale transition.Measured from 50% point of full-scale transition to 2% of final value.Guaranteed by characterization.fCLK max specification production tested at 125 MHz and 5 V. Limits specified here are guaranteed by characterization.
Specifications subject to change without notice.
Figure 1.Timing Diagram
ADV7125
ABSOLUTE MAXIMUM RATINGS1

VAA to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Voltage on any Digital Pin . . . . . GND – 0.5 V to VAA + 0.5 V
Ambient Operating Temperature (TA) . . . . . –40°C to +85°C
Storage Temperature (TS) . . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . 150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C
Vapor Phase Soldering (1 Minute) . . . . . . . . . . . . . . . . 220°C
IOUT to GND2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to VAA
PIN CONFIGURATION
GNDPSAVER2R6R5R7R0R1
VREF
COMP
IOR
IOR
IOG
IOG
VAAB0B1B2B3B5
SYNC
VAA
IOB
IOB
GNDB7
SET
CLOCK
BLANK
GND
GND
GNDGND
GNDGND
ORDERING GUIDE

NOTES
1Specified for –40°C to +85°C operation.
2Specified for 0°C to +70°C operation.
3Available in 3.3 V version only.
NOTESStresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.Analog output short circuit to any power supply or common can be of an indefinite
duration.
CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADV7125 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
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