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ADV7120KST30 ,CMOS 80 MHz, Triple 8-Bit Video DACFEATURESFUNCTIONAL BLOCK DIAGRAM80 MHz Pipelined OperationTriple 8-Bit D/A Converters FS V VAA ADJU ..
ADV7120KST50 ,CMOS 80 MHz, Triple 8-Bit Video DACSpecifications subject to change without notice.–2–REV. BADV7120(V = +5 V 6 5%; V = +1.235 V; R = 3 ..
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AM27C256-255DI , 256 Kilobit (32 K x 8-Bit) CMOS EPRO
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ADV7120KP30-REEL-ADV7120KSTZ30
CMOS 80 MHz, Triple 8-Bit Video DAC
REV.B
CMOS
80 MHz, Triple 8-Bit Video DAC
FUNCTIONAL BLOCK DIAGRAM
PRODUCT HIGHLIGHTS
GENERAL DESCRIPTIONThe ADV7120 (ADV) is a digital to analog video converter on
a single monolithic chip. The part is specifically designed for
high resolution color graphics and video systems. It is also ideal
for any high speed communications type applications requiring
low cost, high speed DACs. It consists of three, high speed,
8-bit, video D/A converters (RGB); a standard TTL input inter-
face and high impedance, analog output, current sources.
The ADV7120 has three separate, 8-bit, pixel input ports, one
each for red, green and blue video data. Additional video input
controls on the part include composite sync, blank and refer-
ence white. A single +5 V supply, an external 1.23 V reference
and pixel clock input are all that are required to make the part
operational.
The ADV7120 is capable of generating RGB video output sig-
nals, which are compatible with RS-343A and RS-170 video
standards, without requiring external buffering.
The ADV7120 is fabricated in a +5 V CMOS process. Its
monolithic CMOS construction ensures greater functionality
with low power dissipation. The part is packaged in both a 0.6",
40-pin plastic DIP and a 44-pin plastic leaded (J-lead) chip car-
rier, PLCC. The ADV7120 is also available in a very small 48-
lead Thin Quad Flatpack (TQFP).
ADV is a registered trademark of Analog Devices, Inc.
*Speed grades up to 140 MHz are also available upon special request.
Please contact Analog Devices or its representatives for further details.
FEATURES
80 MHz Pipelined Operation
Triple 8-Bit D/A Converters
RS-343A/RS-170 Compatible Outputs
TTL Compatible Inputs
+5 V CMOS Monolithic Construction
40-Pin DIP or 44-Pin PLCC and 48-Lead TQFP
APPLICATIONS
High Resolution Color Graphics
CAE/CAD/CAM Applications
Image Processing
Instrumentation
Video Signal Reconstruction
Desktop Publishing
Direct Digital Synthesis (DDS) and I/Q Modulation
SPEED GRADES*
80 MHz
50 MHz
30 MHz
ADV7120–SPECIFICATIONSNOTESTemperature range (TMIN to TMIN); 0°C to +70°C.Sample tested at +25°C to ensure compliance.TTL input values are 0 to 3 volts, with input rise/fall times ≤3 ns, measured between the 10% and 90% points. Timing reference points at 50% for inputs and
outputs. See timing notes in Figure 1.This includes effects due to clock and data feedthrough as well as RGB analog crosstalk.
(VAA = +5 V 6 5%; VREF = +1.235 V; RL = 37.5 V, CL = 10 pF; RSET = 560 V.
ISYNC connected to I0G. All Specifications TMIN to TMAX1 unless otherwise noted.)
TIMING CHARACTERISTICS1(VAA = +5 V 6 5%; VREF = +1.235 V; RL = 37.5 V, CL = 10 pF; RSET = 560 V.
ISYNC connected to IOG. All Specifications TMIN to TMAX2 unless otherwise noted.)NOTESTTL input values are 0 to 3 volts, with input rise/fall times ≤3 ns, measured between the 10% and 90% points. Timing reference points at 50% for inputs
and outputs. See timing notes in Figure 1.Temperature range (TMIN to TMAX): 0°C to +70°CSample tested at +25°C to ensure compliance.
Specifications subject to change without notice.
Figure 1.Video Input/Output Timing
ADV7120
RECOMMENDED OPERATING CONDITIONS
WARNING!
ESD SENSITIVE DEVICE
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADV7120 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS1VAA to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7 V
Voltage on Any Digital Pin . . . . .GND –0.5 V to VAA +0.5 V
Ambient Operating Temperature (TA) . . . . . . . .0°C to +70°C
Storage Temperature (TS) . . . . . . . . . . . . . .–65°C to +150°C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . .+150°C
Soldering Temperature (10 secs) . . . . . . . . . . . . . . . . . .300°C
Vapor Phase Soldering (1 minute) . . . . . . . . . . . . . . . . .220°C
IOR, IOB, IOG, ISYNC to GND2 . . . . . . . . . . . . . .0 V to VAA
NOTESStresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.Analog Output Short Circuit to any Power Supply or Common can be of an
indefinite duration.
ORDERING GUIDENOTESIndustrial temperature range (–40°C to +85°C) version available to special
request. Please consult your local Analog Device representative.N = Plastic DIP; P = Plastic Leaded Chip Carrier.
PIN CONFIGURATIONS
DIP
TQFP
PLCC
IOR
IOG
VAA
VAA
IOB
ISYNC
VAAR6R3R2R1R5B1B4B5B6B2B3
FS ADJUST
REF
COMP
REF WHITE
CLOCK
GND
GND
GND
GND
GND
PIN FUNCTION DESCRIPTION
ADV7120
TERMINOLOGY
Blanking LevelThe level separating the SYNC portion from the video portion
of the waveform. Usually referred to as the front porch or back
porch. At 0 IRE units, it is the level which will shut off the pic-
ture tube, resulting in the blackest possible picture.
Color Video (RGB)This usually refers to the technique of combining the three pri-
mary colors of red, green and blue to produce color pictures
within the usual spectrum. In RGB monitors, three DACs are
required, one for each color.
Sync Signal (SYNC)The position of the composite video signal which synchronizes
the scanning process.
Gray ScaleThe discrete levels of video signal between reference black and
reference white levels. An 8-bit DAC contains 256 different lev-
els while a 6-bit DAC contains 64.
Raster ScanThe most basic method of sweeping a CRT one line at a time to
generate and display images.
Reference Black LevelThe maximum negative polarity amplitude of the video signal.
Reference White LevelThe maximum positive polarity amplitude of the video signal.
Sync LevelThe peak level of the SYNC signal.
Video SignalThat portion of the composite video signal which varies in gray
scale levels between reference white and reference black. Also
referred to as the picture signal, this is the portion which may be
visually observed.
CIRCUIT DESCRIPTION AND OPERATIONThe ADV7120 contains three 8-bit D/A converters, with three
input channels each containing an 8-bit register. Also inte-
grated on board the part is a reference amplifier and CRT con-
trol functions BLANK, SYNC and REF WHITE.
Digital Inputs24-bits of pixel data (color information) R0–R7, G0–G7 and
B0–B7 are latched into the device on the rising edge of each
clock cycle. This data is presented to the three 8-bit DACs and
is then converted to three analog (RGB) output waveforms.
(See Figure 2.)
Three other digital control signals are latched to the analog
video outputs in a similar fashion. BLANK, SYNC and REF
WHITE are each latched on the rising edge of CLOCK to
maintain synchronization with the pixel data stream.
The BLANK and SYNC functions allow for the encoding of
these video synchronization signals onto the RGB video output.
This is done by adding appropriately weighted current sources
to the analog outputs, as determined by the logic levels on the
BLANK and SYNC digital inputs. Figure 3 shows the analog
output, RGB video waveform of the ADV7120. The influence
of SYNC and BLANK on the analog video waveform is
illustrated.
The REF WHITE control input drives the RGB video outputs
to the white level. This function could be used to overlay a cur-
sor or crosshair onto the RGB video output.
Table I details the resultant effect on the analog outputs of
BLANK, SYNC and REF WHITE.
All these digital inputs are specified to accept TTL logic levels.
Clock InputThe CLOCK input of the ADV7120 is typically the pixel clock
rate of the system. It is also known as the dot rate. The dot rate,
and hence the required CLOCK frequency, will be determined
by the on-screen resolution, according to the following
equation:
Dot Rate =(Horiz: Res) × (Vert Res) × (Refresh Rate)/
(Retrace Factor)
Horiz Res=Number of pixels/line
Vert Res=Number of lines/frame
Refresh Rate=Horizontal scan rate. This is the rate at
which the screen must be refreshed, typi-
cally 60 Hz for a noninterlaced system or
30 Hz for an interlaced system.
Retrace Factor=Total blank time factor. This takes into ac-
count that the display is blanked for a cer-
tain fraction of the total duration of each
frame (e.g., 0.8).
