ADUM1100UR ,iCoupler Digital IsolatorSPECIFICATIONSFor ADuM1100AR3Minimum Pulse Width PW 40 ns C = 15 pF, CMOS Signal LevelsL4Maximum Da ..
ADUM1100UR-RL7 ,iCoupler Digital Isolatorcharacteristics superior toLow Power Operation alternatives such as optocoupler devices.5 V Operati ..
ADUM1100URZ , iCoupler Digital Isolator
ADUM1200AR ,Dual-Channel Digital Isolator (2/0 Channel Directionality)SPECIFICATIONS Input Supply Current, per Channel, Quiescent I 0.50 0.60 mA DDI (Q)Out ..
ADUM1200ARZ ,Dual-Channel Digital Isolator (2/0 Channel Directionality)Characteristics ....... 10 Propagation Delay-Related Parameters........ 15 Regulatory Information.. ..
ADUM1200ARZ-RL7 ,Dual-Channel Digital Isolator (2/0 Channel Directionality)Characteristics .... 11 Ordering Guide .. 17 Recommended Operating Conditions 11 Absolute Maximum ..
AM27C010-150DE , 1 Megabit ( 128 K x 8-Bit ) CMOS EPROM Speed options as fast as 45 ns
AM27C010-150LC , 1 Megabit ( 128 K x 8-Bit ) CMOS EPROM Speed options as fast as 45 ns
AM27C010-150LC , 1 Megabit ( 128 K x 8-Bit ) CMOS EPROM Speed options as fast as 45 ns
AM27C010-150PC , 1 Megabit ( 128 K x 8-Bit ) CMOS EPROM Speed options as fast as 45 ns
AM27C010-200DE , 1 Megabit ( 128 K x 8-Bit ) CMOS EPROM Speed options as fast as 45 ns
AM27C010-200DI , 1 Megabit ( 128 K x 8-Bit ) CMOS EPROM Speed options as fast as 45 ns
ADUM1100UR
iCoupler Digital Isolator
REV. E
iCoupler
® Digital Isolator
FEATURES
High Data Rate: DC to 100 Mbps (NRZ)
Compatible with 3.3 V and 5.0 V Operation/
Level Translation
125�C Max Operating Temperature
Low Power Operation
5 V Operation
1.0 mA Max @ 1 Mbps
4.5 mA Max @ 25 Mbps
16.8 mA Max @ 100 Mbps
3.3 V Operation
0.4 mA Max @ 1 Mbps
3.5 mA Max @ 25 Mbps
7.1 mA Max @ 50 Mbps
8-Lead SOIC Package (lead-free version available)
High Common-Mode Transient Immunity: >25 kV/�s
Safety and Regulatory Information
UL Recognized
2500 V rms for 1 Minute per UL 1577
CSA Component Acceptance Notice No. 5A
VDE Certificate of Conformity
DIN EN 60747-5-2 (VDE 0884 Part 2): 2003–01
DIN EN 60950 (VDE 0805): 2001–12; EN 60950: 2000
VIORM = 560 VPEAK
APPLICATIONS
Digital Fieldbus Isolation
Opto-Isolator Replacement
Computer-Peripheral Interface
Microprocessor System Interface
General Instrumentation and Data Acquisition
Applications
GENERAL DESCRIPTIONThe ADuM1100 is a digital isolator based on Analog Devices’
iCoupler technology. Combining high speed CMOS and mono-
lithic air core transformer technology, this isolation component
provides outstanding performance characteristics superior to
alternatives such as optocoupler devices.
Configured as a pin compatible replacement for existing high speed
optocouplers, the ADuM1100 supports data rates as high asMbps and 100Mbps.
The ADuM1100 operates with either voltage supply ranging from
3.0V to 5.5V, boasts a propagation delay of <18 ns and edge
asymmetry of <2 ns, and is compatible with temperatures up to
125°C. It operates at very low power, less than 0.9mA of quiescent
current (sum of both sides), and a dynamic current of less than
160 µA per Mbps of data rate. Unlike other optocoupler alter-
natives, the ADuM1100 provides dccorrectness with a patented
refresh feature that continuously updates the output signal.
The ADuM1100 is offered in three grades. The ADuM1100AR
and ADuM1100BR can operate up to a maximum temperature
of 105°C and support data rates up to 25Mbps and 100Mbps,
respectively. The ADuM1100UR can operate up to a maximum
temperature of 125°C and supports data rates up to 100Mbps.
FUNCTIONAL BLOCK DIAGRAM
ADuM1100–SPECIFICATIONS
ELECTRICAL SPECIFICATIONS, 5 V OPERATION1See Notes on page 5.
Specifications subject to change without notice.
(4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V. All min/max
specifications apply over the entire recommended operation
range, unless otherwise noted. All typical specifications are at TA = 25�C, VDD1 = VDD2 = 5 V.)
ADuM1100
ELECTRICAL SPECIFICATIONS, 3.3 V OPERATION1See Notes on page 5.
Specifications subject to change without notice.
(3.0 V ≤ VDD1 ≤ 3.6 V, 3.0 V ≤ VDD2 ≤ 3.6 V. All min/max
specifications apply over the entire recommended operation
range, unless otherwise noted. All typical specifications are at TA = 25�C, VDD1 = VDD2 = 3.3 V.)
ADuM1100
ELECTRICAL SPECIFICATIONS, MIXED 5 V/3 V or 3 V/5 V OPERATION1(5 V/3 V operation: 4.5 V ≤ VDD1
≤ 5.5 V, 3.0 V ≤ VDD2 ≤ 3.6 V.
3 V/5V operation: 3.0 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V. All min/max specifications apply over the entire recommended operation range,
unless otherwise noted. All typical specifications are at TA = 25�C, VDD1 = 3.3 V, VDD2 = 5 V or VDD1 = 5 V, VDD2 = 3.3 V.)
ADuM1100NOTESAll voltages are relative to their respective ground.Output supply current values are with no output load present. The supply current drawn at a given signal frequency when an output load is present is given by
IDD2(L) = IDD2 + VDD2 × f × CL, where IDD2 is the unloaded output supply current, f is the input signal frequency, and CL is the output load capacitance.The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.tPHL is measured from the 50% level of the falling edge of the VI signal to the 50% level of the falling edge of the VO signal. tPLH is measured from the 50% level of
the rising edge of the VI signal to the 50% level of the rising edge of the VO signal.Since the input thresholds of the ADuM1100 are at voltages other than the 50% level of typical input signals, the measured propagation delay and pulse width distortion
may be affected by slow input rise/fall times. See the Propagation Delay-Related Parameters section and Figures 3 to 7 for information on the impact of given input
rise/fall times on these parameters.Pulse width distortion change versus temperature is the absolute value of the change in pulse width distortion for a 1°C change in operating temperature.tPSK1 is the magnitude of the worst-case difference in tPHL and/or tPLH that will be measured between units at the same operating temperature and output load within
the recommended operating conditions. tPSK2 is the magnitude of the worst-case difference in tPHL and/or tPLH that will be measured between units at the same operating
temperature, supply voltages, and output load within the recommended operating conditions.CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew
rate that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling edges. The transient magnitude is the
range over which the common-mode is slewed.The dynamic power dissipation capacitance is given by
CPDi = (IDDi(100) – IDDi(Q))/(VDDi × f), where i = 1 or 2 and f is the input signal frequency.
The supply current consumptions at a given frequency and output load are calculated as
IDD1 = CPD1 × VDD1 × f + IDD1(Q); IDD2(L) = (CPD2 + CL) × VDD2 × f + IDD2(Q), where CL is the output load capacitance.
Specifications subject to change without notice.
PACKAGE CHARACTERISTICSNOTESDevice considered a 2-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together.Input capacitance is measured at Pin 2 (VI).
ADuM1100
INSULATION AND SAFETY-RELATED SPECIFICATIONS
DIN EN 60747-5-2 (VDE 0884 Part 2) INSULATION CHARACTERISTICSClimatic Classification
Pollution Degree (DIN VDE 0110, Table I)
Maximum Working Insulation Voltage
This isolator is suitable for basic isolation only within the safety limit data. Maintenance of the safety data shall be ensured by means of protective circuits.
The *marking on the package denotes DIN EN 60747-5-2 approval for 560 VPEAK working voltage.
REGULATORY INFORMATIONThe ADuM1100 has been approved by the following organizations:
NOTES
1In accordance with UL 1577, each ADuM1100 is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 second (leakage detection current limit, II–O ≤ 5 µA).
2In accordance with DIN EN 60747-5-2, each ADuM1100 is proof tested by applying an insulation test voltage ≥1050 VPEAK for 1 second (partial discharge detection
limit ≤ 5 pC). A “*” mark branded on the component designates DIN EN 60747-5-2 approval.
Figure 1.Thermal Derating Curve, Dependence of
Safety-Limiting Values with Case Temperature per
DIN EN 60747-5-2
ABSOLUTE MAXIMUM RATINGS1NOTESStresses above those listed under Absolute Maximum Ratings may cause permanent
damage to the device. This is a stress rating only. Functional operation of the device at
these or any other conditions above those listed in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions may affect
device reliability. Ambient temperature = 25°C, unless otherwise noted.All voltages are relative to their respective ground.See Figure 1 for information on maximum allowable current for various temperatures.Refers to common-mode transients across the insulation barrier. Common-mode
transients exceeding the Absolute Maximum Rating may cause latch-up or permanent
damage.
RECOMMENDED OPERATING CONDITIONSNOTESAll voltages are relative to their respective ground.Input switching thresholds have 300 mV of hysteresis.
See the Method of Operation, DC Correctness, and Magnetic Field Immunity section and Figures 8 and 9 for information on immunity to external magnetic fields.
ADuM1100
ORDERING GUIDEADuM1100AR-RL7
ADuM1100ARZ*
ADuM1100ARZ-RL7*
ADuM1100BR
ADuM1100BR-RL7
ADuM1100BRZ*
ADuM1100BRZ-RL7*
ADuM1100UR
ADuM1100UR-RL7
ADuM1100URZ*
ADuM1100URZ-RL7*
*Z = Lead Free
Note: Package branding is as follows:
where:= DIN EN 60747-5-2 mark
R= Package Designator (R denotes SOIC)
YYWW= Date Code
XXXXXX= Lot Code
PIN CONFIGURATION
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADuM1100 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
Table I.Truth Table (Positive Logic)*VO returns to VI state within 1 µs of power restoration.
