ADUC836BCP ,Precision Analog Microcontroller: 1MIPS 8052 MCU + 62kB Flash + Dual 16-Bit ADC + 12-Bit DACSPECIFICATIONS Conversion Rate 5.4 On Both Channels ..
ADUC836BS ,MicroConverter, Dual 16-Bit-ADCs with Embedded 62 kB Flash MCUSPECIFICATIONS Conversion Rate 5.4 On Both Channels ..
ADUC836BS ,MicroConverter, Dual 16-Bit-ADCs with Embedded 62 kB Flash MCUSPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 Parallel Programm ..
ADUC841BCP62-3 ,Precision Analog Microcontroller: 20MIPS 8052 Flash MCU + 8-Ch 12-Bit ADC + Dual 12-Bit DACFEATURES Pin compatable ugrade of ADuC812/ADuC831/ADuC832 12-BITADuC841/ADuC842/ADuC843 1Increased ..
ADUC841BCP62-5 ,Precision Analog Microcontroller: 20MIPS 8052 Flash MCU + 8-Ch 12-Bit ADC + Dual 12-Bit DACAPPLICATIONS The microcontroller is an optimized 8052 core offering up to Optical networking—laser ..
ADUC841BS62-3 ,Precision Analog Microcontroller: 20MIPS 8052 Flash MCU + 8-Ch 12-Bit ADC + Dual 12-Bit DACCharacteristics for typical performance at other values of f SAMPLEResolution 12 12 Bits Integral ..
AM27C010 , 1 Megabit ( 128 K x 8-Bit ) CMOS EPROM Speed options as fast as 45 ns
AM27C010-120DC , 1 Megabit ( 128 K x 8-Bit ) CMOS EPROM Speed options as fast as 45 ns
AM27C010-120DC , 1 Megabit ( 128 K x 8-Bit ) CMOS EPROM Speed options as fast as 45 ns
AM27C010-120DE , 1 Megabit ( 128 K x 8-Bit ) CMOS EPROM Speed options as fast as 45 ns
AM27C010-120DI , 1 Megabit ( 128 K x 8-Bit ) CMOS EPROM Speed options as fast as 45 ns
AM27C010-120JC , 1 Megabit ( 128 K x 8-Bit ) CMOS EPROM Speed options as fast as 45 ns
ADUC836BCP
Precision Analog Microcontroller: 1MIPS 8052 MCU + 62kB Flash + Dual 16-Bit ADC + 12-Bit DAC
ANALOG
DEVICES
#lier0ihmvertero, Dual 16-Bit E-A
ADBs with Embedded 62 k8 Flash MCU
ADu8836
FEATURES
High Resolution E-A ADCs
2 Independent ADCs (16-Bit Resolution)
16-Bit No Missing Codes, Primary ADC
16-Bit rms (16-Bit p-p) Effective Resolution @ 20 Hz
Offset Drift 10 nV/°C, Gain Drift 0.5 ppml°c
Memory
62 Kbytes On-Chip Flash/EE Program Memory
4 Kbytes On-Chip Flash/EE Data Memory
Flash/EE, 100Year Retention, 100 Kcycles Endurance
3 Levels of Flash/EE Program Memory Security
ln-Circuit Serial Download (No External Hardware)
High Speed User Download (5 Seconds)
2304 Bytes On-Chip Data RAM
8051 Based Core
8051 Compatible Instruction Set
32 kHz External Crystal
On-Chip Programmable PLL (12.58 MHz Max)
3 x 16-BitTimer/Counter
26 Programmable I/O Lines
11 Interrupt Sources, 2 Priority Levels
Dual Data Pointer, Extended 11-Bit Stack Pointer
On-Chip Peripherals
Internal Power on Reset Circuit
12-Bit Voltage Output DAC
Dual 16-Bit E-A DACs/PWMs
On-ChipTemperature Sensor
Dual Excitation Current Sources
Time Interval Counter (Wake-Up/RTCTimer)
UART, SPP, and PCO Serial I/O
High Speed Baud Rate Generator (Including 115,200l
Watchdog Timer (WDT)
Power Supply Monitor (PSM)
Normal: 2.3 mA Max @ 3.6V (Core CLK = 1.57 MHz)
Power-Down: 20 WA Max with Wake-UpTimer Running
Specified for 3 V and 5 V Operation
Package and Temperature Range
52-Lead MQFP (14 mm x 14 mm), -40''C to +125°C
56-Lead LFCSP (8 mm x 8 mm), -4ty'C to +85°C
APPLICATIONS
Intelligent Sensors
Weigh Scales
Portable Instrumentation, Battery-Powered Systems
4-20 mATransmitters
Data Logging
Precision System Monitoring
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed byAnalog Devices for its
use, nor for any infringements of patents or other rights of third parties
that may result from its use. No license is granted by implication or other-
wise under any patent or patent rights ofAnalog Devices.Trademarks and
registered trademarks are the property of their respective companies.
FUNCTIONAL BLOCK DIAGRAM
ADuC836
PRIMARY
PGA 16-BIT E-h ADC
AUXILIARY
1 6-BIT E-h ADC
SENSOR
EXTERNAL INTERNAL
vREF - BAND GAP _ ____________
DETECT VREF 8051-BASED MCU WITH ADDITIONAL n
l PERIPHERALS
62 KBYTES FLASH/EE PROGRAM MEMORY
4 KBYTES FLASH/EE DATA MEMORY
2304 BYTES USER RAM
PLL AND FROG 3 X 16 BIT TIMERS POWER SUPPLY MON I
CLOCK DIV BAUD R ATE TIMER WATCHDOG TIMER I
WAK5UP/ 4 X PARALLEL UART SPI ANDIZC
l OSC . RTC TIMER PORTS si'saii'Lird
XTAL1 XTAL2
GENERAL DESCRIPTION
The ADuC836 is a complete smart transducer front end, integrating
two high resolution 2-h ADCs, an 8-bit MCU, and program/data
Flash/EE memory on a single chip.
The two independent ADCs (primary and auxiliary) include a
temperature sensor and a PGA (allowing direct measurement
of low level signals). The ADCs with on-chip digital filtering and
programmable output data rates are intended for the measure-
ment of wide dynamic range, low frequency signals, such as those
in weigh scale, strain gage, pressure transducer, or temperature
measurement applications.
The device operates from a 32 kHz crystal with an on-chip PLL
generating a high frequency clock of 12.58 MHz. This clock is
routed through a programmable clock divider from which the MCU
core clock operating frequency is generated.The microcontroller
core is an 8052 and therefore 8051 instruction set compatible
with 12 core clock periods per machine cycle.
62 Kbytes of nonvolatile Flash/EE program memory, 4 Kbytes of
nonvolatile Flash/EE data memory, and 2304 bytes of data RAM
are provided on-chip. The program memory can be configured as
data memory to give up to 60 Kbytes of NV data memory in data
logging applications.
On-chip factory firmware supports in-circuit serial download and
debug modes (via UART), as well as single-pin emulation mode
via the a pin. The ADuC836 is supported by a QuickStart"'
development system featuring low cost software and hardware
development tools.
One Technology Way, PO. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
ADu8836
TABLE OF CONTENTS
FEATURES ...................................... 1 N ONVOLATILE FLASHIEE MEMORY
Flash/EE Memory Overview ........................ 29
APPLICATIONS .................................. 1 Flash/EE Memory and the ADuC83 6 ................. 29
FUNCTIONAL BLOCK DIAGRAM .................. 1 ADuC836 Flash/EE Memory Reliability ............... 29
GENERAL DESCRIPTION ......................... 1 Fla§h/EE Program Memory T....................... 30
Serial Downloading ............................... 30
SPECIFICATIONS ................................ 3 Parallel Programming ............................. 30
User Download Mode (ULOAD) .................... 31
ABSOLUTE MAXIMUM RATINGS ................. 9 Flash/EE Program Memory Security .................. 31
ORDERING GUIDE B.............................. 9 Lock, Secure, and Serial Safe Modes .................. 31
Using the Flash/EE Data Memory ................... 32
PIN CONFIGURATIONS _.......................... 9 ECON ........................................ 32
DETAILED BLOCK DIAGRAM .................... 10 Programming the Flash/EE Data Memory ............. 33
Flash/EE Memory Timing .......................... 33
PIN FUNCTION DESCRIPTIONS .................. 10
OTHER ON-CHIP PERIPHERALS
MEMORY ORGANIZATION T...................... 13 DAC ......................................... 34
SPECIAL FUNCTION REGISTERS (SFRS) .......... 14 PWM v........................................ 36
Accumulator SFR (ACC) .......................... 14 On-Chip PLL .................................. 39
B SFR (B) ...................................... 14 Time Interval Counter (Wake-Up/RT C T imer) ......... 40
Data Pointer (DPTR) ............................. 14 Watchdog Timer ................................. 42
Stack Pointer (SP and SPH) ........................ 15 Power Supply Monitor ............................ 43
Program Status Word (PSW) ........................ 15 Serial Peripheral Interface (SPI) ..................... 44
Power Control SFR (PCON) ....................... 15 12C Serial Interface ............................... 46
ADuC836 Configuration SFR (CFG836) .............. 15 Dual Data Pointer ............................... 48
Complete SFR Map .............................. 16 8052 C o MP ATIBLE ON-CHIP PERIPHERALS
ADC SFR INTERFACE Parallel I/O Ports 0-3 ............................. 49
ADCSTAT ..................................... 17 Timers/Counters ................................. 52
ADCMODE .................................... 18 UART Serial Interface ............................ 57
ADCOCON .................................... 19 UART Operating Modes ........................... 57
ADCl CON .................................... 19 Baud Rate Generation Using Timer 1 and Timer 2 ....... 59
ADCOH/ADCOM/ADClH/ADCIL w................. 20 Baud Rate Generation Using Timer 3 ................. 60
OFOH/OFOM/OFI H/OFIL B....................... 20 Interrupt System ................................. 61
GN0H/GN0M/GN1H/GNIL ....................... 20
SF ............................................ 21 HARDWARE DESIGN CONSIDERATIONS
ICON ......................................... 21 External Memory Interface ......................... 63
Power Supplies .................................. 64
PRIMARY AND AUXILIARY ADC NOISE Power-On Reset (POR) Operation ................... 64
PERFORMANCE B............................. 22 Power Consumption .............................. 64
PRIMARY AND AUXILIARY ADC CIRCUIT Power Saving Modes .............................. 65
DESCRIPTION 15ake-UY from Power-Down Latency ..... . ............ 65
Overview ....................................... 23 Grounding and Board LayouF Reciommendations ........ 66
Primary ADC ................................... 23 t1P1f136fystem Self-Identification .................. 66
Auxiliary ADC B................................. 24 Clock Oscillator ................................. 66
Analog Input Channels ............................ 24 OTHER H ARDWARE CONSIDERATIONS
Primary and Auxiliary ADC Inputs ................... 25 In-Circuit Serial Download Access ................... 67
Analog Input Ranges P............................. 25 Embedded Serial Port Debugger ..................... 67
Programmable Gain Amplifier ....................... 25 Single-Pin Emulation Mode ........................ 67
Bipolar/Unipolar Inputs ........................... 25 Typical System Configuration F...................... 68
Reference Input ................................. 26
Burnout Currents ................................ 26 QUICKSTART DEVELOPMENT SYSTEM ........... 69
Excitation Currents ............................... 26
Reference Detect ................................. 26 TIMING SPECIFICATIONS F...................... 70
2-h Modulator .................................. 26 OUTLINE DIMENSIONS ......................... 80
Digital Filter .................................... 27
ADC Chopping .................................. 28
Calibration ..................................... 28
-2- REV. A
(AVDD = 2.7 ll to 3.6 ll or 4.75 ll to 5.25 ll, Wo = 2.7 ll to 3.6 ll or 4.75 ll to 5.25 ll,
SPECIFIIJATIIJNS1
REFIN(+) = 2.5ll; itEFlllf-) = AGND; hilllll = Mllll = ll 1l;l(Tht1lliThUl =
32.768 kHz Crystal; all speeifieatitms u, to Tm, unless otherwise noted.)
ADu8836
Parameter ADuC836 Test ConditionsIComments Unit
ADC SPECIFICATIONS
Conversion Rate 5.4 On Both Channels Hz min
105 Programmable in 0.732 ms Increments Hz max
Primary ADC
No Missing Codes2 16 20 Hz Update Rate Bits min
Resolution 13.5 Range = $20 mV, 20 Hz Update Rate Bits p-p typ
16 Range = i256 V, 20 Hz Update Rate Bits p-p typ
Output Noise See Tables X and XI in Output Noise Varies with Selected
ADuC836 ADC Description Update Rate and Gain Range
Integral Nonlinearity i15 1 LSB ppm of FSR max
Offset Error3 i3 WV typ
Offset Error Drift i10 nV/°C typ
Full-Scale Error4 i10 Range = i20 mV to i640 mV WV typ
b).5 Range = i1.28V to i2.56V LSB typ
Gain Error Drift5 i0.5 ppm/°C typ
ADC Range Matching i2 AIN = 18 mV WV typ
Power Supply Rejection (PSR) 95 AIN = 7.8 mV, Range = i20 mV st typ
80 AIN = IV, Range = i2.56V st typ
Common-Mode DC Rejection
On AIN 95 At DC, AIN = 7.8 mV, Range = i20 mV st typ
113 At DC,AIN= 1V,Range = i2.56V st typ
On REFIN 125 At DC, AIN = IV, Range = i2.56V st typ
Common-Mode 50 Hz/60 Hz Rejection 20 Hz Update Rate
On AIN 95 50 Hz/60 Hz i1 Hz, AIN = 7.8 mV, st typ
Range = $20 mV
90 50 Hz/60 Hz i1 Hz,AIN = IV, st typ
Range = i2.56V
On REFIN 90 50 Hz/60 Hz i1 Hz,AIN = IV, st typ
Range = 12.56V
Normal Mode 50 Hz/60 Hz Rejection
On AIN 60 50 Hz/60 Hz i1 Hz, 20 Hz Update Rate st typ
On REFIN 60 50 Hz/60 Hz i1 Hz, 20 Hz Update Rate st typ
Auxiliary ADC
No Missing Codes2 16 Bits min
Resolution 16 Range = $2.5 V, 20 Hz Update Rate Bits p-p typ
Output Noise See Table XII in ADuC836 Output Noise Varies with Selected
ADC Description Update Rate
Integral Nonlinearity i 15 ppm of FSR max
Offset Error3 -2 LSB typ
Offset Error Drift 1 pV/°C typ
Full-Scale Error6 -2.5 LSB typ
Gain Error Drift5 i0.5 ppm/°C typ
Power Supply Rejection (PSR) 80 AIN = IV, 20 Hz Update Rate st typ
Normal Mode 50 Hz/60 Hz Rejection
On AIN 60 50 Hz/60 Hz i1 Hz st typ
On REFIN 60 50 Hz/60 Hz i1 Hz, 20 Hz Update Rate st typ
DAC PERFORMANCE
DC Specifications'
Resolution 12 Bits
Relative Accuracy i3 LSB typ
Differential Nonlinearity -1 Guaranteed 12-Bit Monotonic LSB max
Offset Error $50 mV max
Gain Error8 i1 AVDD Range % max
i1 VREF Range % typ
AC Specifications"
Voltage Output Settling Time 15 Settling Time to 1 LSB of FinalValue us typ
Digital-to-Analog Glitch Energy 10 1 LSB Change at Major Carry nVs typ
REV. A
ADuC836
SPECIFICATIONS (continued)
Parameter ADuC836 Test Conditions/Comments Unit
INTERNAL REFERENCE
ADC Reference
Reference Voltage 1.25 i 1% InitialTolerance @ 25°C,VDD = 5 V V min/max
Power Supply Rejection 45 st typ
Reference Tempco 100 ppm/°C typ
DAC Reference
Reference Voltage 2.5 i 1% InitialTolerance (fi) 25°C,VDD = 5 V V min/max
Power Supply Rejection 50 st typ
Reference Tempco i 100 ppm/°C typ
ANALOG INPUTS/REFERENCE INPUTS
Primary ADC
Differential Input Voltage Ranges'', 10 External Reference Voltage = 2.5 V
RN2, RNl, RNO ofADCOCON Set to
Bipolar Mode (ADCOCON3 = 0) $20 0 0 0 (Unipolar Mode 0 mV to 20 mV) mV
b10 0 0 l (Unipolar Mode 0 mV to 40 mV) mV
i80 0 1 0 (Unipolar Mode 0 mV to 80 mV) mV
i160 0 1 l (Unipolar Mode 0 mV to 160 mV) mV
-+320 1 0 0 (Unipolar Mode 0 mV to 320 mV) mV
-+640 1 0 1 (Unipolar Mode 0 mV to 640 mV) mV
$1.28 1 1 0 (Unipolar Mode 0V to 1.28 V) V
12.56 1 1 1 (Unipolar Mode 0V to 2.56V) V
Analog Input Currents i1 TMAX = 85°C nA max
i5 TMAX = 125°C nA max
Analog Input Current Drift i5 TMAX = 85°C pA/°C typ
i15 TMAX = 125°C pA/°C typ
Absolute AIN Voltage Limits2 AGND + 100 mV V min
AVDD - 100 mV V max
Auxiliary ADC
Input Voltage Range 10 0 t0 VREF Unipolar Mode, for Bipolar Mode V
See Note 11
Average Analog Input Current 125 Input CurrentWillVary with Input nA/V typ
Average Analog Input Current Drift2 i2 Voltage on the Unbuffered Auxiliary ADC pA/V/°C typ
Absolute AIN Voltage Limits2, ll AGND - 30 mV V min
AVDD + 30 mV V max
External Reference Inputs
REFIN(+) to REFIN(-) Range2 1 V min
AVDD V max
Average Reference Input Current 1 Both ADCs Enabled PAIN typ
Average Reference Input Current Drift i0.1 nA/V/°C typ
"NO Ext. REF" Trigger Voltage 0.3 NOXREF Bit Active if VREF < 0.3 V V min
0.65 NOXREF Bit Inactive if VREF > 0.65 V V max
ADC SYSTEM CALIBRATION
Full-Scale Calibration Limit 1.05 X FS V max
Zero-Scale Calibration Limit -1.05 M FS V min
Input Span 0.8 X FS V min
2.1 X FS V max
ANALOG (DAC) OUTPUT
Voltage Range 0 to VREF DACRN = 0 in DACCON SFR V typ
0 t0 AVDD DACRN = 1 in DACCON SFR V typ
Resistive Load 10 From DAC Output to AGND kfl typ
Capacitive Load 100 From DAC Output to AGND pF typ
Output Impedance 0.5 n typ
ISINK 50 MA typ
TEMPERATURE SENSOR
Accuracy i2 "C typ
Thermal Impedance (61A) 90 MQFP Package "C/W typ
52 CSP Package (Base Floating)" °C/W typ
REV. A
