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ADUC814BRU
MicroConverter/ Small Package 12-Bit ADC with Embedded Flash MCU
MicroConverter®, Small Package
12-Bit ADC with Embedded Flash MCU
FEATURES
ANALOG I/O
6-channel 247 kSPS ADC
12-bit resolution
ADC high speed data capture mode
Programmable reference via on-chip DAC for low
level inputs, ADC performance specified to VREF = 1 V
Dual voltage output DACs
12-bit resolution, 15 µs settling time
Memory
8 kbytes on-chip Flash/EE program memory
640 bytes on-chip Flash/EE data memory
Flash/EE, 100 year retention, 100 kcycle endurance
3 levels of Flash/EE program memory security
In-circuit serial downlaod (no external hardware)
256 bytes on-chip data RAM
8051 based core
8051 compatible instruction set
32 kHz external crystal,
on-chip programmable PLL (16.78 MHz max)
Three 16-bit timer/counters
11 programmable I/O lines
11 interrupt sources, 2 priority levels
Power
Specified for 3 V and 5 V operation
Normal: 3 mA @ 3 V (core CLK = 2.1 MHz)
Power-down: 15 µA (32 kHz oscillator running)
On-chip peripherals
Power-on reset circuit (no need for external POR device)
Temperature monitor (±1.5°C accuracy)
Precision voltage reference
Time interval counter (wake-up/RTC timer)
UART serial I/O
SPI®/I2C® compatible serial I/O
Watchdog timer (WDT), power supply monitor (PSM)
Package and temperature range
28-lead TSSOP 4.4 mm × 9.7 mm package
Fully specified for −40°C to +125°C operation
APPLICATIONS
Optical networking—laser power control
Base station systems—power amplifier bias control
Precision instruments, smart sensors
Battery-powered systems, precision system monitors
FUNCTIONAL BLOCK DIAGRAM
XTAL2XTAL1
AIN0
VREF
CREF
AIN502748-A-001Figure 1.
GENERAL DESCRIPTION The ADuC814 is a fully integrated 247 kSPS, 12-bit data acquisi-
tion system incorporating a high performance multichannel
ADC, an 8-bit MCU, and program/data Flash/EE memory on a
single chip.
This low power device operates from a 32 kHz crystal with an
on-chip PLL generating a high frequency clock of 16.78 MHz.
This clock is, in turn, routed through a programmable clock
divider from which the MCU core clock operating frequency is
generated.
The microcontroller core is an 8052 and is compatible with an
8051 instruction. 8 kBytes of nonvolatile Flash/EE program
memory are provided on-chip. 640 bytes of nonvolatile Flash/EE
data memory and 256 bytes RAM are also integrated on-chip.
The ADuC814 also incorporates additional analog functionality
with dual 12-bit DACs, a power supply monitor, and a band gap
reference. On-chip digital peripherals include a watchdog timer,
time interval counter, three timer/counters, and two serial I/O
ports (SPI and UART).
On-chip factory firmware supports in-circuit serial download
and debug modes (via UART), as well as single-pin emulation
mode via the DLOAD pin. The ADuC814 is supported by a
QuickStart™ Development System.
The part operates from a single 3 V or 5 V supply over the
extended temperature range −40°C to +125°C. When operating
from 3 V supplies, the power dissipation for the part is below
10 mW. The ADuC814 is housed in a 28-lead TSSOP package.
TABLE OF CONTENTS Specifications.....................................................................................4
Absolute Maximum Ratings............................................................9
ESD Caution..................................................................................9
Pin Configuration and Function Description............................10
Terminology....................................................................................12
ADC Specifications....................................................................12
DAC Specifications.....................................................................12
Typical Performance Curves.........................................................13
ADuC814 Architecture, Main Features.......................................16
Memory Organization...............................................................17
Overview of MCU-Related SFRs..............................................18
Accumulator SFR...................................................................18
B SFR........................................................................................18
Stack Pointer SFR...................................................................18
Data Pointer............................................................................18
Program Status Word SFR.....................................................18
Power Control SFR.................................................................19
Special Function Registers........................................................20
ADC Circuit Information..............................................................21
General Overview.......................................................................21
ADC Transfer Function.............................................................21
ADC Data Output Format....................................................21
SFR Interface to ADC Block.....................................................22
ADCCON1 (ADC Control SFR 1)..........................................22
ADCCON2 (ADC Control SFR 2)..........................................23
ADCCON3 (ADC Control SFR 3)..........................................24
Driving the ADC.............................................................................25
Voltage Reference Connections................................................26
Configuring the ADC................................................................26
Initiating ADC Conversions.....................................................27
ADC Offset and Gain Calibration Overview.........................28
ADC Offset and Gain Calibration Coefficients.....................28
Calibrating the ADC..................................................................29
Initiating Calibration in Code..................................................29
Nonvolitile Flash/EE Memory......................................................30
Flash/EE Memory Overview....................................................30
Flash/EE Memory and the ADuC814......................................30
ADuC814 Flash/EE Memory Reliability.................................30
Using Flash/EE Program Memory...........................................31
Serial Downloading (In-Circuit Programming)................31
Parallel Programming............................................................31
Flash/EE Program Memory Security.......................................31
Lock Mode..............................................................................31
Secure Mode...........................................................................31
Serial Safe Mode.....................................................................31
Using Flash/EE Data Memory..................................................32
ECON—Flash/EE Memory Control SFR...........................32
Flash/EE Memory Timing........................................................33
Using the Flash/EE Memory Interface................................33
Programming a Byte..............................................................33
User Interface to Other On-Chip ADuC814 Peripherals..........34
DACs............................................................................................34
Using the DACs......................................................................35
On-Chip PLL..............................................................................37
Time Interval Counter (TIC)....................................................38
Watchdog Timer.........................................................................41
Power Supply Monitor...............................................................42
ADuC814 Configuration Register (CFG814)........................43
Serial Peripheral Interface.....................................................43
External Clock........................................................................43
Serial Peripheral Interface..........................................................44
MISO (Master In, Slave Out Data I/O Pin).........................44
MOSI (Master Out, Slave In Pin)..........................................44
SCLOCK (Serial Clock I/O Pin)...........................................44
SS (Slave Select Input Pin).....................................................44
Using the SPI Interface...........................................................45
SPI Interface—Master Mode.................................................45
SPI Interface—Slave Mode....................................................45 2C Compatible Interface............................................................46
8051 Compatible On-Chip Peripherals....................................47
Parallel I/O Ports 1 and 3.......................................................47
Additional Digital Outputs Pins...........................................47
Timers/Counters.........................................................................48
Timer/Counter 0 and 1 Data Registers................................49
Timer/Counter 0 and 1 Operating Modes...............................50
Mode 0 (13-Bit Timer/Counter)...........................................50
Mode 1 (16-Bit Timer/Counter)...........................................50
Mode 2 (8-Bit Timer/Counter with Autoreload)................50
Mode 3 (Two 8-Bit Timer/Counters)...................................50
Timer/Counter 2 Data Registers...........................................51
Timer/Counter 2 Operating Modes.........................................52
16-Bit Autoreload Mode.........................................................52
16-Bit Capture Mode..............................................................52
UART Serial Interface.................................................................53
SBUF.........................................................................................53
Mode 0: 8-Bit Shift Register Mode.......................................54
Mode 1: 8-Bit UART, Variable Baud Rate............................54
Mode 2: 9-Bit UART with Fixed Baud Rate........................55
Mode 3: 9-Bit UART with Variable Baud Rate....................55
UART Serial Port Baud Rate Generation............................55
Timer 2 Generated Baud Rates.............................................56
Interrupt System..........................................................................57
Interrupt Priority....................................................................59
Interrupt Vectors.....................................................................59
ADuC814 Hardware Design Considerations..............................60
Clock Oscillator...........................................................................60
Power Supplies.............................................................................60
Power Consumption...................................................................60
Power-Saving Modes..............................................................61
Power-On Reset......................................................................61
Grounding and Board Layout Recommendations.............61
Other Hardware Considerations...............................................62
In-Circuit Serial Download Access......................................62
Embedded Serial Port Debugger..........................................62
Single-Pin Emulation Mode..................................................63
Timing Specifications.....................................................................64
Outline Dimensions........................................................................70
Ordering Guide...........................................................................71
REVISION HISTORY 12/03 – Data Sheet Changed from REV. 0 to REV. A
Added detailed description of product...........................Universal
Changes to Specifications.................................................................4
Updated Outline Dimensions........................................................70
Changes to Ordering Guide...........................................................71
SPECIFICATIONS
Table 1. AVDD = DVDD = 2.7 V to 3.3 V or 4.5 V to 5.5 V, VREF = 2.5 V internal reference, XTAL1/XTAL2 = 32.768 kHz crystal. All
specifications TMIN to TMAX, unless otherwise specified1
A GRADE
B GRADE