ADT7466ARQZ ,dBCool Remote Thermal Controller and Voltage Monitorapplications One on-chip and up to two remote temperature sensors with requiring active system cool ..
ADT7467ARQ ,dBCOOL™ Remote Thermal Monitor and Fan ControllerOverview........ 34 Product Description. 9 Step 1: Hardware Configuration. 35 Comparison between A ..
ADT7467ARQ-REEL ,dBCOOL™ Remote Thermal Monitor and Fan Controllerapplications requiring active system cooling. The Series resistance cancellation on the remote chan ..
ADT7467ARQZ ,dBCOOL™ Remote Thermal Monitor and Fan ControllerSPECIFICATIONS TA = TMIN to TMAX, VCC = VMIN to VMAX, unless otherwise noted. All voltages are mea ..
ADT7467ARQZ-REEL7 ,dBCOOL™ Remote Thermal Monitor and Fan Controllerspecifications (fully SMBus 1.1 compliant) FUNCTIONAL BLOCK DIAGRAM SCL SDA SMBALERTSERIAL BUSINTE ..
ADT7468ARQ ,dBCOOL™ Remote Thermal Controller and Voltage Monitorspecifications (fully SMBus 1.1 compliant) FUNCTIONAL BLOCK DIAGRAM SCL SDA SMBALERTVID5VID4ACOUST ..
AM26LV31CD ,Low-Voltage High-Speed Quadruple Differential Line DriverMaximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNIT(2) ..
AM26LV31CDR ,Low-Voltage High-Speed Quadruple Differential Line DriverSupport &Product Order Tools &TechnicalCommunityFolder Now Documents SoftwareAM26LV31SLLS201H–MAY 1 ..
AM26LV31CDRG4 ,Low-Voltage High-Speed Quadruple Differential Line Driver 16-SOIC 0 to 70Features... 18.4 Device Functional Modes.... 112 Applications..... 19 Application and Implementatio ..
AM26LV31CNS , LOW-VOLTAGE HIGH-SPEED QUADRUPLE DIFFERENTIAL LINE DRIVERS
AM26LV31CNSR ,Low-Voltage High-Speed Quadruple Differential Line DriverBlock Diagram... 10Information..... 154 Revision HistoryNOTE: Page numbers for previous revisions m ..
AM26LV31EIDR ,Low-Voltage High-Speed Quadruple Differential Line Driver With +/-15-kV IEC ESD Protection 16-SOIC -40 to 85 SLLS848B–APRIL 2008–REVISED SEPTEMBER 20165 Pin Configuration and FunctionsD, NS, or PW PackageRGY ..
ADT7466ARQZ
dBCool Remote Thermal Controller and Voltage Monitor
dBCool® Remote Thermal
Controller and Voltage Monitor
Rev. 0
FEATURES
Monitors two analog voltages or thermistor temperature
inputs
One on-chip and up to two remote temperature sensors with
series resistance cancellation
Controls and monitors the speed of up to two fans
Automatic fan speed control mode controls system
cooling based on measured temperature
Enhanced acoustic mode dramatically reduces user
perception of changing fan speeds
Thermal protection feature via THERM output monitors
performance impact of Intel® Pentium® 4 processor
thermal control circuit via PROCHOT input
3-wire fan speed measurement
Limit comparison of all monitored values
SMBus 1.1 serial interface
APPLICATIONS
Low acoustic noise notebook PCs
GENERAL DESCRIPTION The ADT7466 dBCool controller is a complete thermal monitor
and dual fan controller for noise-sensitive applications
requiring active system cooling. It can monitor two analog
voltages or the temperature of two thermistors, plus its own
supply voltage. It can monitor the temperature of up to two
remote sensor diodes, plus its own internal temperature. It can
measure and control the speed of up to two fans so that they
operate at the lowest possible speed for minimum acoustic
noise. The automatic fan speed control loop optimizes fan
speed for a given temperature. The effectiveness of the system’s
thermal solution can be monitored using the PROCHOT input
to time and monitor the PROCHOT output of the processor.
FUNCTIONAL BLOCK DIAGRAM
VCC
GNDREFOUT
SCLSDAALERT
DRIVE1
DRIVE2
TACH1
TACH2
FANLOCK
FAN1_ON/
PROCHOT/
THERM
D1+
D1–
AIN1/TH1/D2–
AIN2/TH2/D2+Figure 1.
. Patent Numbers 6,188,189; 6,169,442; 6,097,239; 5,982,221; 5,867,012.
TABLE OF CONTENTS Specifications.....................................................................................3
Serial Bus Timing.........................................................................5
Absolute Maximum Ratings............................................................6
Thermal Characteristics..............................................................6
ESD Caution..................................................................................6
Pin Configuration and Function Descriptions.............................7
Typical Performance Characteristics.............................................8
Functional Description..................................................................11
Measurement Inputs..................................................................11
Sequential Measurement...........................................................11
Fan Speed Measurement and Control.....................................11
Internal Registers of the ADT7466..........................................11
Theory of Operation......................................................................12
Serial Bus Interface.....................................................................12
Write and Read Operations.......................................................14
Alert Response Address (ARA)................................................15
SMBus Timeout..........................................................................15
Voltage Measurement................................................................15
Reference Voltage Output..........................................................16
Configuration of Pin 11 and Pin 12.........................................16
Temperature Measurement.......................................................17
Series Resistance Cancellation..................................................17
Temperature Measurement Method........................................17
Using Discrete Transistors........................................................17
Temperature Measurement Using Thermistors.....................19
Reading Temperature from the ADT7466..............................20
Additional ADC Functions.......................................................21
Limit Values................................................................................21
Alert Interrupt Behavior............................................................23
Configuring the ADT7466 THERM Pin as an Output.........25
Fan Drive.....................................................................................26
PWM or Switch Mode Fan Drive.............................................26
Fan Speed Measurement...........................................................26
Fan Start-Up Timeout................................................................28
Automatic Fan Speed Control..................................................29
Starting the Fan..........................................................................30
XOR Test Mode...............................................................................31
Application Circuit.........................................................................32
ADT7466 Register Map.................................................................33
Register Details...........................................................................35
Outline Dimensions.......................................................................47
Ordering Guide..........................................................................47
REVISION HISTORY
6/05—Revision 0: Initial Version
SPECIFICATIONS TA = TMIN to TMAX, VCC = VMIN to VMAX, unless otherwise noted.1
Table 1.
1 All voltages are measured with respect to GND, unless otherwise specified. Typical values are at T = 25°C and represent the most likely parametric norm. Logic inputs
accept input high voltages up to 5 V even when the device is operating at supply voltages below 5 V. Timing specifications are tested at logic levels of V = 0.8 V for a
falling edge and at V = 2.0 V for a rising edge. Guaranteed by design, not production tested.
SERIAL BUS TIMING SCL
SDA
tSU;DATtF
Figure 2. Diagram for Serial Bus Timing
ABSOLUTE MAXIMUM RATINGS
Table 2. Stresses greater than those listed under Absolute Maximum
Ratings may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL CHARACTERISTICS 16-Lead QSOP Package:
θJA = 105°C/W
θJC = 39°C/W
ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degrada-
tion or loss of functionality.
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DRIVE1SCL
TACH1SDA
DRIVE2ALERT
TACH2REFOUT
GNDAIN2/TH2/D2+
VCCAIN1/TH1/D2–
FAN1_ON/PROCHOT/THERMD1+
FANLOCKD1–
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions TYPICAL PERFORMANCE CHARACTERISTICS
–1010080604020LEAKAGE RESISTANCE (MΩ)
RATURE
RROR (
°C)
Figure 4. Temperature Error vs. PCB Track Resistance
–1045321NOISE FREQUENCY (MHz)
RATURE
RROR (
°C)
Figure 5. Remote Temperature Error vs. Power Supply Noise Frequency
–1045321NOISE FREQUENCY (MHz)
RATURE
RROR (
Figure 6. Local Temperature Error vs. Power Supply Noise Frequency
–102015105CAPACITANCE (nF)
RATURE
RROR (
°C)
Figure 7. Temperature Error vs. Capacitance Between D+ and D−
45321NOISE FREQUENCY (MHz)
RATURE
RROR (
°C)
Figure 8. Remote Temperature Error vs. Common-Mode Noise Frequency
–1045321NOISE FREQUENCY (MHz)
RATURE
RROR (
Figure 9. Remote Temperature Error vs. Differential Mode Noise Frequency
3.05.45.25.04.84.64.44.24.03.83.63.43.2VDD (V)
IDD
Figure 10. Standby Supply Current vs. Supply Voltage
050100150200250300350400SCL FREQUENCY (kHz)
HUTDOWN I
Figure 11. Standby Current vs. Clock Frequency
ACTUAL TEMPERATURE (°C)
TIUM 4
RE
ADING (Figure 12. Pentium 4 Temperature Measurement vs. ADT7466 Reading
100065040302010TIME (s)
URE
D TE
RATURE
°C)
Figure 13. Response to Thermal Shock
0.893.23.03.43.63.84.04.24.44.64.85.05.25.4VDD (V)
IDD
(mA)
Figure 14. Supply Current vs. Supply Voltage
–40020406085105125TEMPERATURE (°C)
RATURE
RROR
Figure 15. Local Temperature Error
–40020406085105125TEMPERATURE (°C)
RATURE
RROR
Figure 16. Remote Temperature Error
FUNCTIONAL DESCRIPTION The ADT7466 is a complete thermal monitor and dual fan
controller for any system requiring monitoring and cooling.
The device communicates with the system via a serial system
management bus (SMBus). The serial data line (SDA, Pin 15) is
used for reading and writing addresses and data. The input line,
(SCL, Pin 16) is the serial clock. All control and programming
functions of the ADT7466 are performed over the serial bus. In
addition, an ALERT output is provided to indicate out-of-limit
conditions.
MEASUREMENT INPUTS The device has three measurement inputs, two for voltage and
one for temperature. It can also measure its own supply voltage
and can measure ambient temperature with its on-chip
temperature sensor.
Pin 11 and Pin 12 are analog inputs with an input range of 0 V
to 2.25 V. They can easily be scaled for other input ranges by
using external attenuators. These pins can also be configured
for temperature monitoring by using thermistors or a second
remote diode temperature measurement.
The ADT7466 can simultaneously monitor the local
temperature, the remote temperature by using a discrete
transistor, and two thermistor temperatures.
Remote temperature sensing is provided by the D+ and D−
inputs, to which diode connected, remote temperature sensing
transistors such as a 2N3904 or CPU thermal diode can be
connected.
Temperature sensing using thermistors is carried out by placing
the thermistor in series with a resistor. The excitation voltage is
provided by the REFOUT pin.
The device also accepts input from an on-chip band gap
temperature sensor that monitors system ambient temperature.
Power is supplied to the chip via Pin 6. The system also
monitors VCC through this pin. It is normally connected to a
3.3 V supply. It can, however, be connected to a 5 V supply and
monitored without going over range.
SEQUENTIAL MEASUREMENT When the ADT7466 monitoring sequence is started, it
sequentially cycles through the measurement of analog inputs
and the temperature sensors. Measured values from these
inputs are stored in value registers, which can be read out over
the serial bus, or can be compared with programmed limits
stored in the limit registers. The results of out of limit
comparisons are stored in the status registers, which can be read
over the serial bus to flag out-of-limit conditions.
FAN SPEED MEASUREMENT AND CONTROL The ADT7466 has two tachometer inputs for measuring the
speed of 3-wire fans, and it has two 8-bit DACs to control the
speed of two fans. The temperature measurement and fan speed
control can be linked in an automatic control loop, which can
operate without CPU intervention to maintain system operating
temperature within acceptable limits. The enhanced acoustics
feature ensures that fans operate at the minimum possible speed
consistent with temperature control, and change speed
gradually. This reduces the user’s perception of changing fan
speed.
INTERNAL REGISTERS OF THE ADT7466 Table 4 provides brief descriptions of the ADT7466’s principal
internal registers. More detailed information on the function of
each register is given in Table 30 to Table 72.
Table 4. Internal Register Summary
Register Description
THEORY OF OPERATION
SERIAL BUS INTERFACE The serial system management bus (SMBus) is used to control
the ADT7466. The ADT7466 is connected to this bus as a slave
device under the control of a master controller.
The ADT7466 has an SMBus timeout feature. When this is
enabled, the SMBus times out after typically 25 ms of no
activity. However, this feature is enabled by default. Bit 5 of
Configuration Register 1 (0x00) should be set to 1 to disable
this feature.
The ADT7466 supports optional packet error checking (PEC).
It is triggered by supplying the extra clock pulses for the PEC
byte. The PEC byte is calculated using CRC-8. The frame check
sequence (FCS) conforms to CRC-8 by the polynomial 1128+++=xxxxC
Consult the SMBus Specifications Rev. 1.1 for more information
(www.smbus.org).
The ADT7466 has a 7-bit serial bus address, which is fixed at
1001100.
The serial bus protocol operates as follows:
The master initiates data transfer by establishing a start condition,
defined as a high-to-low transition on the serial data line SDA
while the serial clock line SCL remains high. This indicates that
an address/data stream follows. All slave peripherals connected
to the serial bus respond to the start condition, and shift in the
next 8 bits, consisting of a 7-bit address (MSB first) and a R/W
bit, which determines the direction of the data transfer, that is,
whether data is written to or read from the slave device.
The address of the ADT7466 is set at 1001100. Since the address
must always be followed by a write bit (0) or a read bit (1), and
data is generally handled in 8-bit bytes, it may be more conven-
ient to think that the ADT7466 has an 8-bit write address of
10011000 (0x98) and an 8-bit read address of 10011001 (0x99).
The peripheral whose address corresponds to the transmitted
address responds by pulling the data line low during the low
period before the 9th clock pulse, known as the acknowledge
bit. All other devices on the bus now remain idle while the
selected device waits for data to be read from or written to it. If
the R/W bit is 0, the master writes to the slave device. If the
R/W bit is 1, the master reads from the slave device.
Data is sent over the serial bus in sequences of 9 clock pulses,
8 bits of data followed by an acknowledge bit from the slave
device. Transitions on the data line must occur during the low
period of the clock signal and remain stable during the high
period, because a low-to-high transition when the clock is high
write operation is limited only by what the master and slave
devices can handle.
When all data bytes have been read or written, stop conditions
are established. In write mode, the master pulls the data line
high during the 10th clock pulse to assert a stop condition. In
read mode, the master device overrides the acknowledge bit by
pulling the data line high during the low period before the
ninth clock pulse. This is known as No Acknowledge. The
master takes the data line low during the low period before the
10th clock pulse, and then high during the 10th clock pulse to
assert a stop condition.
Any number of bytes of data can be transferred over the serial
bus in one operation, but it is not possible to mix read and write
in one operation, because the type of operation is determined at
the beginning and subsequently cannot be changed without
starting a new operation.
ADT7466 write operations contain either one or two bytes, and
read operations contain one byte, and perform the following
functions.
To write data to one of the device data registers or read data
from it, the address pointer register must be set so that the
correct data register is addressed, and data can be written to
that register or read from it. The first byte of a write operation
always contains an address that is stored in the address pointer
register. If data is to be written to the device, the write operation
contains a second data byte that is written to the register
selected by the address pointer register. This is shown in
Figure 17. The device address is sent over the bus followed by
R/W set to 0. This is followed by two data bytes. The first data
byte is the address of the internal data register to be written to,
which is stored in the address pointer register. The second data
byte is the data to be written to the internal data register.
When reading data from a register, there are two possibilities.
If the ADT7466 address pointer register value is unknown or
not the desired value, it is necessary to first set it to the correct
value before data can be read from the desired data register.
This is done by performing a write to the ADT7466 as before,
but only the data byte containing the register address is sent
since data is not to be written to the register. This is shown in
Figure 18.
A read operation is then performed consisting of the serial bus
address, R/W bit set to 1, followed by the data byte read from
the data register. This is shown in Figure 19.
If the address pointer register is known to already be at the
desired address, data can be read from the corresponding data
SCL
SDA
START BYMASTERACK. BYADT7466ACK. BYADT7466
ACK. BYADT7466STOP BYMASTER
FRAME 2ADDRESS POINTER REGISTER BYTEFRAME 1SERIAL BUS ADDRESS BYTE1
SCL (CONTINUED)
SDA (CONTINUED)
FRAME 3 DATA BYTE
Figure 17. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register
START BYMASTERACK. BYADT7466ACK. BYADT7466STOP BYMASTER
FRAME 2ADDRESS POINTER REGISTER BYTEFRAME 1SERIAL BUS ADDRESS BYTE
SCL
SDA
Figure 18. Writing to the Address Pointer Register Only
START BYMASTERACK. BYADT7466NO ACK. BYMASTERSTOP BYMASTER
FRAME 2ADDRESS POINTER REGISTER BYTEFRAME 1SERIAL BUS ADDRESS BYTE
SCL
SDA
Figure 19. Reading Data from a Previously Selected Register
Although it is possible to read a data byte from a data register
without first writing to the address pointer register if the
address pointer register is already at the correct value, it is not
possible to write data to a register without writing to the address
pointer register, because the first data byte of a write is always
written to the address pointer register.
In addition to supporting the send byte and receive byte
protocols, the ADT7466 also supports the read byte protocol
(see the SMBus Specifications Rev. 1.1 for more information).
If it is required to perform several read or write operations in
succession, the master can send a repeat start condition instead
of a stop condition to begin a new operation.
WRITE AND READ OPERATIONS The SMBus specification defines several protocols for different
types of write and read operations. The protocols used in the
ADT7466 are discussed in the following sections. The following
abbreviations are used in the diagrams:
S—Start
P—Stop
R—Read
W—Write
A—Acknowledge
A—No Acknowledge
Write Operations The ADT7466 uses the send byte and write byte protocols.
Send Byte In this operation, the master device sends a single command
byte to a slave device, as follows:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed by the
write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends a register address.
5. The slave asserts ACK on SDA.
6. The master asserts a stop condition on SDA and the
transaction ends.
For the ADT7466, the send byte protocol is used to write a
register address to RAM for a subsequent single-byte read from
the same address. This is shown in Figure 20.
Figure 20. Setting a Register Address for Subsequent Read
If it is required to read data from the register immediately after
setting up the address, the master can assert a repeat start con-
dition immediately after the final ACK and carry out a single-
byte read without asserting an intermediate stop condition.
Write Byte In this operation, the master device sends a command byte and
one data byte to the slave device, as follows:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed by the
write bit (low).
3. The addressed slave device asserts ACK on SDA.
4. The master sends a register address.
5. The slave asserts ACK on SDA.
6. The master sends a data byte.
7. The slave asserts ACK on SDA.
8. The master asserts a stop condition on SDA to end the
transaction.
This is shown in Figure 21.
Figure 21. Single-Byte Write to a Register
Read Operations The ADT7466 uses the following SMBus read protocols.
Receive Byte This is useful when repeatedly reading a single register. The
register address needs to have been set up previously.
In this operation, the master device receives a single byte from a
slave device, as follows:
1. The master device asserts a start condition on SDA.
2. The master sends the 7-bit slave address followed by the
read bit (high).
3. The addressed slave device asserts ACK on SDA.
4. The master receives a data byte.
5. The master asserts NO ACK on SDA.
6. The master asserts a stop condition on SDA and the
transaction ends.
For the ADT7466, the receive byte protocol is used to read a
single byte of data from a register whose address was set
previously by a send byte or write byte operation.
ALERT RESPONSE ADDRESS (ARA) ARA is a feature of SMBus devices that allows an interrupting
device to identify itself to the host when multiple devices exist
on the same bus. The ALERT output can be used as an interrupt
output, or it can be used as an ALERT. One or more outputs can
be connected to a common ALERT line connected to the
master. If a device’s ALERT line goes low, the following occurs:
1. ALERT is pulled low.
2. The master initiates a read operation and sends the alert
response address (ARA = 0001 100). This is a general call
address, which must not be used as a specific device
address.
3. The device whose ALERT output is low responds to the
alert response address, and the master reads its device
address. The address of the device is now known, and it
can be interrogated in the usual way.
4. If more than one device’s ALERT output is low, the one
with the lowest device address has priority, in accordance
with normal SMBus arbitration.
5. Once the ADT7466 responds to the alert response address,
the master must read the status registers, the ALERT is
cleared only if the error condition no longer exists.
SMBus TIMEOUT The ADT7466 includes an SMBus timeout feature. If there is no
SMBus activity for 25 ms, the ADT7466 assumes that the bus is
locked, and it releases the bus. This prevents the device from
locking or holding the SMBus expecting data. Some SMBus
controllers cannot handle the SMBus timeout feature, so they
are disabled.
Table 5. Configuration Register 1—Register 0x00
VOLTAGE MEASUREMENT The ADT7466 has two external voltage measurement channels.
Pin 11 and Pin 12 are analog inputs with a range of 0 V to
2.25 V. It can also measure its own supply voltage, VCC. The VCC
supply voltage measurement is carried out through the VCC pin
(Pin 6). Setting Bit 6 of Configuration Register 1 (0x00) allows a
5 V supply to power the ADT7466 and be measured without
overranging the VCC measurement channel.
A/D Converter All analog inputs are multiplexed into the on-chip, successive
approximation, analog-to-digital converter. This has a resolution
of 10 bits. The basic input range is 0 V to 2.25 V, but the VCC
produces an output of 3/4 full scale (decimal 768 or 0x300) for
the nominal supply voltage, and so has adequate headroom to
cope with overvoltages.
Table 9 shows the input ranges of the analog inputs and the
output codes of the ADC.
Table 6. Voltage Measurement Registers Associated with each voltage measurement channel are high
and low limit registers. Exceeding the programmed high or low
limit causes the appropriate status bit to be set. Exceeding either
limit can also generate ALERT interrupts.
Table 7. Voltage Measurement Limit Registers When the ADC is running, it samples and converts a voltage
input in 1 ms, and averages 16 conversions to reduce noise.
Therefore a measurement on each input takes nominally 16 ms.
Turn Off Averaging For each voltage measurement read from a value register, 16
readings have actually been made internally and the results
averaged, before being placed into the value register. There can
be an instance where faster conversions are required. Setting
Bit 4 of Configuration Register 2 (0x01) turns averaging off.
This effectively gives a reading 16 times faster (1 ms), but as a
result the reading can be noisier.
Single-Channel ADC Conversions Setting Bit 3 of Configuration Register 4 (0x03) places the
ADT7466 into single-channel ADC conversion mode. In this
mode, the ADT7466 can be made to read a single voltage channel
only. If the internal ADT7466 clock is used, the selected input is
read every 1 ms. The appropriate ADC channel is selected by
writing to Bits 2:0 of Configuration Register 4 (0x03).
Table 8. Single-Channel ADC Conversions
REFERENCE VOLTAGE OUTPUT The ADT7466 has a reference voltage of 2.25 V, which is
available on Pin 13 of the device. It can be used for scaling and
offsetting the analog inputs to give different voltage ranges. It
can also be used as an excitation voltage for a thermistor when
the analog inputs are configured as thermistor inputs. See the
Temperature Measurement section for more details.
CONFIGURATION OF PIN 11 AND PIN 12 Pin 11 and Pin 12 can be used for analog inputs, thermistor
inputs, or connecting a second remote thermal diode. The
ADT7466 is configured for thermistor connection by default.
The device is configured for the different modes by setting the
appropriate bits in the configuration registers. Bits 6:7 of
Configuration Register 3 (0x02) configure the device for either
analog inputs or thermistor inputs. Bit 7 of Configuration
Register 2 (0x01) configures Pin 11 and Pin 12 for the
connection of a second thermal diode. Bits 2:3 of Interrupt
Status Register 2 (0x11) indicate either an open or short circuit
on Thermal Diode 1 and Diode 2 inputs. Bits 4:5 of Interrupt
Status Register 2 (0x11) indicate either an open or short circuit
on TH1 and TH2 inputs. It is advisable to mask interrupts on
diode open/short alerts when in thermistor monitoring mode
and to mask interrupts on thermistor open/short alerts when in
REM2 mode.
Table 9. A-to-D Output Code vs. VIN
Table 10. Mode Configuration Summary OOL = Out of limit. NC = No connection.
TEMPERATURE MEASUREMENT The ADT7466 has two dedicated temperature measurement
channels, one for measuring the temperature of an on-chip
band gap temperature sensor, and one for measuring the
temperature of a remote diode, usually located in the CPU. In
addition, the analog input channels, AIN1 and AIN2, can be
reconfigured to measure the temperature of a second diode by
setting Bit 7 of Configuration Register 2 (0x01), or to measure
temperature using thermistors by setting Bit 6 and/or Bit 7 of
Configuration Register 3 (0x02).
SERIES RESISTANCE CANCELLATION Parasitic resistance, seen in series with the remote diode
between the D+ and D− inputs to the ADT7466, is caused by a
variety of factors including PCB track resistance and track
length. This series resistance appears as a temperature offset in
the sensor’s temperature measurement. This error typically
causes a 1°C offset per ohm of parasitic resistance in series with
the remote diode. The ADT7466 automatically cancels the
effect of this series resistance on the temperature reading, giving
a more accurate result without the need for user characterization
of the resistance. The ADT7466 is designed to automatically
cancel typically 2 kΩ of resistance. This is done transparently to
the user, using an advanced temperature measurement method
described in the following section.
TEMPERATURE MEASUREMENT METHOD A simple method of measuring temperature is to exploit the
negative temperature coefficient of a diode, by measuring the
base emitter voltage (VBE) of a transistor operated at constant
current. Unfortunately, this technique requires calibration to
null out the effect of the absolute value of VBE, which varies
from device to device.
The technique used in the ADT7466 measures the change in
VBE when the device is operated at three different currents.
Previous devices used only two operating currents, but it is the
third current that allows series resistance cancellation.
Figure 24 shows the input signal conditioning used to measure
the output of a remote temperature sensor. This figure shows
the remote sensor as a substrate transistor, provided for
temperature monitoring on some microprocessors, but it could
also be a discrete transistor. If a discrete transistor is used, the
collector is not grounded, and should be linked to the base. To
prevent ground noise from interfering with the measurement,
the more negative terminal of the sensor is not referenced to
ground but is biased above ground by an internal diode at the
D– input. If the sensor is operating in an extremely noisy
environment, C1 may optionally be added as a noise filter. Its
value should never exceed 1000 pF. See the Layout
Considerations section for more information on C1.
To measure ΔVBE, the operating current through the sensor is
switched between three related currents. Figure 24 shows N1 × I
and N2 × I as different multiples of the current I. The currents
through the temperature diode are switched between I and
N1 × I, giving ΔVBE1, and then between I and N2 × I, giving
ΔVBE2. The temperature can then be calculated using the two
ΔVBE measurements. This method can also cancel the effect of
series resistance on the temperature measurement. The
resulting ΔVBE waveforms are passed through a 65 kHz low-pass
filter to remove noise, and then to a chopper-stabilized
amplifier. This amplifies and rectifies the waveform to produce
a dc voltage proportional to ΔVBE. The ADC digitizes this
voltage, and a temperature measurement is produced. To reduce
the effects of noise, digital filtering is performed by averaging
the results of 16 measurement cycles for low conversion rates.
Signal conditioning and measurement of the internal
temperature sensor is performed in the same manner.
USING DISCRETE TRANSISTORS If a discrete transistor is used, the collector is not grounded and
should be linked to the base. If an NPN transistor is used, the
emitter is connected to the D− input and the base to the D+
input. If a PNP transistor is used, the base is connected to the
D− input and the emitter to the D+ input. Figure 23 shows how
to connect the ADT7466 to an NPN or PNP transistor for
temperature measurement. To prevent ground noise interfering
with the measurement, the more negative terminal of the sensor
is not referenced to ground, but is biased above ground by an
internal diode at the D− input.
2N3904NPNPNP Figure 23. Connections for NPN and PNP Transistors
VOUT+
VOUT–
REMOTE
Temperature Data Format The temperature data stored in the temperature data registers
consists of a high byte with an LSB size equal to 1°C. If higher
resolution is required, two additional bits are stored in the
extended temperature registers, giving a resolution of 0.25°C.
The temperature measurement range for both local and remote
measurements is, by default, 0°C to 127°C (binary), so the ADC
output code equals the temperature in degrees Celsius, and half
the range of the ADC is not actually used.
The ADT7466 can also be operated by using an extended
temperature range from −64°C to +191°C. In this case, the
whole range of the ADC is used, but the ADC code is offset by
+64°C, so it does not correspond directly to the temperature.
(0°C = 0100000) .
The user can switch between these two temperature ranges by
setting or clearing Bit 7 in Configuration Register 1. The
measurement range should be switched only once after power-
up, and the user should wait for two monitoring cycles
(approximately 68 ms) before expecting a valid result. Both
ranges have different data formats, as shown in Table 11.
Table 11. Temperature Data Format Binary scale temperature measurement returns 0 for all temperatures ≤0°C.
2 Offset binary scale temperature values are offset by +64.
While the temperature measurement range can be set to −64°C
to +191°C for both local and remote temperature monitoring,
the ADT7466 itself should not be exposed to temperatures
greater than those specified in the Absolute Maximum Ratings
table. Furthermore, the device is guaranteed to only operate at
ambient temperatures from −40°C to +125°C. In practice, the
device itself should not be exposed to extreme temperatures,
and may need to be shielded in extreme environments to
comply with these requirements. Only the remote temperature
monitoring diode should be exposed to temperatures above
+120°C and below −40°C. Care should be taken in choosing a
remote temperature diode to ensure that it can function over
the required temperature range.
Nulling Out Temperature Errors The ADT7466 automatically nulls out temperature
measurement errors due to series resistance, but systematic
errors in the temperature measurement can arise from a
number of sources, and the ADT7466 can reduce these errors.
As CPUs run faster, it is more difficult to avoid high frequency
clocks when routing the D+, D− tracks around a system board.
Even when recommended layout guidelines are followed, there
may still be temperature errors attributed to noise being
coupled onto the D+/D− lines. High frequency noise generally
has the effect of giving temperature measurements that are too
high by a constant amount. The ADT7466 has temperature
offset registers at addresses 0x26 and 0x27 for the remote and
local temperature channels. A one time calibration of the
system can determine the offset caused by system board noise
and null it out using the offset registers. The offset registers
automatically add a twos complement 8-bit reading to every
temperature measurement. The LSB adds 1°C offset to the
temperature reading so the 8-bit register effectively allows
temperature offsets of up to ±128°C with a resolution of 1°C.
This ensures that the readings in the temperature measurement
registers are as accurate as possible.
Table 12. Temperature Offset Registers
Table 13. Temperature Measurement Registers Associated with each temperature measurement channel are
high and low limit registers. Exceeding the programmed high or
low limit causes the appropriate status bit to be set. Exceeding
either limit can also generate ALERT interrupts.
Table 14. Temperature Measurement Limit Registers
All temperature limits must be programmed in the same format
as the temperature measurement. If this is offset binary, add 64
(0x40 or 01000000) to the actual temperature limit in degrees
Celsius.
Layout Considerations Digital boards can be electrically noisy environments. Take the
following precautions to protect the analog inputs from noise,
particularly when measuring the very small voltages from a
remote diode sensor.
Place the ADT7466 as close as possible to the remote sensing
diode. Provided that the worst noise sources, such as clock
generators, data/address buses and CRTs, are avoided, this
distance can be 4 inches to 8 inches.
If the distance to the remote sensor is more than 8 inches, the
use of twisted-pair cable is recommended. This works from
about 6 feet to 12 feet.
For very long distances (up to 100 feet), use shielded twisted
pair, such as Belden #8451 microphone cable. Connect the
twisted pair to D+ and D− and the shield to GND close to the
ADT7466. Leave the remote end of the shield unconnected to
avoid ground loops.
Because the measurement technique uses switched current
sources, excessive cable and/or filter capacitance can affect the
measurement. When using long cables, the filter capacitor could
be reduced or removed.
Route the D+ and D− tracks close together, in parallel, with
grounded guard tracks on each side. Provide a ground plane
under the tracks if possible.
Use wide tracks to minimize inductance and reduce noise
pickup. A 5 mil track minimum width and spacing is
recommended.
GND
GND04711-044
Figure 25. Arrangement of Signal Tracks
Try to minimize the number of copper/solder joints, which can
cause thermocouple effects. Where copper/solder joints are
used, make sure that they are in both the D+ and D− paths and
are at the same temperature.
Thermocouple effects should not be a major problem because
two thermocouples with a big temperature differential between
them, thermocouple voltages should be much less than 200 mV.
Place a 0.1 µF bypass capacitor close to the ADT7466.
TEMPERATURE MEASUREMENT USING
THERMISTORS The analog input channels, AIN1 and AIN2, can be used to
measure temperature by using negative temperature coefficient
(NTC) thermistors. NTC thermistors have a nonlinear transfer
function of the form ⎟⎠⎜⎜⎝−×=2t2teRR
where:
Rt2 is the resistance at temperature t2.
Rt1 is the resistance at temperature t1 (usually 25°C).
e = 2.71828.
B is the B constant of the thermistor (typically between 3000
and 5000).
A thermistor can be made to give a voltage output that is fairly
linear over a limited range by making it part of a potential
divider as shown in Figure 26.
A potential divider, with a thermistor as the upper part
connected to REFOUT, produces an output voltage that varies
nonlinearly in proportion to the inverse of the resistance. By
suitable choice of thermistor and fixed resistor, this can be made
to approximately cancel the nonlinearity of the thermistor
resistance vs. temperature curve, thus giving a fairly linear
output voltage with temperature over a limited range. This
circuit uses REFOUT as the excitation voltage for both the
thermistor and for the ADC, so any variation in REFOUT is
cancelled, and the measurement is purely ratiometric.
TH2
REXT2
Figure 26. Temperature Measurement Using Thermistor
Thermistor Linearization A linear transfer function can be obtained over a limited
temperature range by connecting the thermistor in series with
an optimum resistor. Placing a resistor in series with the
thermistor as shown in Figure 26 produces an S-shaped error
curve as shown in Figure 27. The overall error across the range
can be reduced by calculating the external resistor so that the
error is 0 at the ends of the range. REXT is calculated as follows: 2(2()(
MIDMAXMIN
MAXMINMAXMINMID
EXTRRRRRRRR×−+×−+×=
where:
RMIN is the thermistor value at TMIN.
RMAX is the thermistor value at TMAX.
RMID is the thermistor value at
Figure 27 shows the linearity error using a 100 kΩ thermistor
with a B value of 3500 and a 14400 Ω resistor. Using the
specified thermistor and resistor, the error over a temperature
range of 30°C to 100°C is less than ±2°C. Other thermistors can
be used, but the resistor value is different. A smaller error can
be achieved over a narrower temperature range; conversely, a
wider temperature range can be used, but the error is greater. In
both cases, the optimum resistor value is different.
30405060708090100TEMPERATURE (°C)
RROR (
°C)
Figure 27. Linearity Error Using Specified Components
Thermistor Normalization Even when the thermistor is linearized, it does not provide an
output to the ADC that gives a direct temperature reading in
degrees Celsius. The linearized data is proportional to the
voltage applied; however, normalization is needed to use the
value as a temperature reading.
To overcome this problem, when an analog input is configured
for use with a thermistor, the output of the ADC is scaled and
offset so that it produces the same output (for example, 1 LSB =
0.25°C) as from the thermal diode input, when REXT is chosen to
linearize the thermistor over 30°C to 100°C.
Normalization can be chosen for 10 kΩ thermistors by setting
Bit 0 of Configuration Register 2 (0x01) or for 100 kΩ
thermistors by clearing this bit (default setting).
READING TEMPERATURE FROM THE ADT7466 It is important to note that temperature can be read from the
ADT7466 as an 8-bit value (with 1°C resolution) or as a 10-bit
value (with 0.25°C resolution). If only 1°C resolution is
required, the temperature readings can be read at any time
and in no particular order.
If the 10-bit measurement is required, this involves a 2-register
read for each measurement. The extended resolution registers
(0x08 and 0x09) should be read first. This causes all temperature
reading registers to be frozen until all temperature reading
registers have been read. This prevents an MSB reading from
being updated while its 2 LSBs are being read and vice versa.
Measurement Sequence The ADT7466 automatically measures each analog and
temperature channel in the following round-robin sequence:
1. AIN1/TH1
2. AIN2(TH2)
3. VCC
4. Remote Temperature 1 (D1)
5. Local Temperature
If AIN1 and AIN2 are configured for a second thermal diode,
this is measured instead of the AIN1 and AIN 2 measurements,
and the result stored in the AIN1 reading register (0x0A).
Analog Monitoring Cycle Time The analog monitoring cycle begins when a 1 is written to the
start bit (Bit 0) of Configuration Register 1 (0x00). The ADC
measures each analog input in turn, and, as each measurement
is completed, the result is automatically stored in the appropriate
value register. This round-robin monitoring cycle continues
until disabled by writing a 0 to Bit 0 of Configuration Register 1.
Since the ADC is normally left to free-run in this manner, the
time to monitor all the analog inputs is normally not of interest,
because the most recently measured value of any input can be
read at any time.
For applications where the monitoring cycle time is important,
it can easily be calculated from the measurement times of the
individual channels. With averaging turned on, each
measurement is taken 16 times and the averaged result is placed
in the value register. The worst-case monitoring cycle times for
averaging turned on and off is described in Table 15.
Fan tach measurements are made in parallel but independently
and are not synchronized with the analog measurements.
Table 15. Monitoring Cycle Time 1 Pin 11 and Pin 12 configured for AIN/thermistor monitoring. The total
excludes the Remote 2 temperature time.
2 Pin 11 and Pin 12 configured for second thermal diode monitoring. The total
excludes the AIN1/Thermistor 1 and AIN2/Thermistor 2 times.
ADDITIONAL ADC FUNCTIONS A number of other functions are available on the ADT7466 to
offer the systems designer increased flexibility.
Turn Off Averaging For each temperature measurement read from a value register,
16 readings have actually been made internally and the results
averaged before being placed into the value register. The user
may want to take a very fast measurement, for example, of CPU
temperature. Setting Bit 4 of Configuration Register 2 (0x01)
turns averaging off.
Single-Channel ADC Conversions Setting Bit 3 of Configuration Register 4 (Address 0x03) places
the ADT7466 into single-channel ADC conversion mode. In
this mode, the ADT7466 can be made to read a single
temperature channel only. The selected input is read every
1.4 ms. The appropriate ADC channel is selected by writing to
Bits 2:0 of Configuration Register 4 (Address 0x03).
Table 16. ADC Single-Channel Selection
LIMIT VALUES High and low limits are associated with each measurement
channel on the ADT7466. These limits can form the basis of
system status monitoring; a status bit can be set for any out-of-
limit condition and detected by polling the device. Alternatively,
ALERT interrupts can be generated to flag out-of-limit
conditions for a processor or microcontroller.
Voltage and temperature limits are only 8-bit values and are
compared with the 8 MSBs of the voltage and temperature
values.
8-Bit Limits The following tables list the 8-bit limits on the voltage limit and
temperature limit registers of the ADT7466.
Table 17. Voltage Limit Registers
Table 18. Temperature Limit Registers
16-Bit Limits The fan tach measurements are 16-bit results. The fan tach
limits are also 16 bits, consisting of a high byte and low byte.
Since fans running under speed or stalled are normally the only
conditions of interest, only high limits exist for fan tachs. Since
the fan tach period is actually being measured, exceeding the
limit indicates a slow or stalled fan.
Table 19. Fan Limit Registers
Out-of-Limit Comparisons Once all limits have been programmed, ADT7466 monitoring
can be enabled. The ADT7466 measures all parameters in round-
robin format and sets the appropriate status bit for out-of-limit
conditions. Comparisons are done differently depending on
whether the measured value is being compared to a high or low
limit.
A greater than comparison is performed when comparing with
the high limit.
A less than or equal to comparison is performed when comparing
with the low limit.
Status Registers The results of limit comparisons are stored in Status Register 1
and Status Register 2. The status register bit for each channel
reflects the status of the last measurement and limit comparison
on that channel. If a measurement is within limits, the corre-
sponding status register bit is cleared to 0. If the measurement is
out-of-limits the corresponding status register bit is set to 1.
The state of the various measurement channels can be polled by
reading the status registers over the serial bus. When Bit 7
(OOL) of Status Register 1 (0x10) is 1, an out-of-limit event has
been flagged in Status Register 2. Therefore the user need only
read Status Register 2 when this bit is set. Alternatively, the
ALERT output (Pin 14) can be used as an interrupt, which
automatically notifies the system supervisor of an out-of-limit
condition. Reading the status registers clears the appropriate
status bit as long as the error condition that caused the interrupt
has cleared. Status register bits are sticky, meaning that they
remain set until read by software. Whenever a status bit is set,
indicating an out-of-limit condition, it remains set even if the
event that caused it cleared (until read). The only way to clear
the status bit is to read the status register when the event clears.
Interrupt status mask registers (0x12, 0x13) allow individual
interrupt sources to be masked from causing an ALERT.
However, if one of these masked interrupt sources goes out-of-
limit, its associated status bit is set in the interrupt status
registers.
Table 20. Interrupt Status Register 1 (Reg. 0x10)
Table 21. Interrupt Status Register 2 (Reg. 0x11) ALERT INTERRUPT BEHAVIOR The ADT7466 can be polled for status, or an ALERT interrupt
can be generated for out-of-limit conditions. It is important to
note how the ALERT output and status bits behave when
writing interrupt handler software.
HIGH LIMIT
TEMPERATURE
STICKYSTATUSBIT
ALERT
Figure 28. ALERT and Status Bit Behavior
Figure 28 shows how the ALERT output and sticky status bits
behave. Once a limit is exceeded, the corresponding status bit is
set to 1. The status bit remains set until the error condition
subsides and the status register is read. This ensures that an out-
of-limit event cannot be missed if software is polling the device
periodically. The ALERT output remains low while a reading is
out-of-limit, until the status register is read. This has implica-
tions on how software handles the interrupt.
Handling Alert Interrupts To prevent the system from being tied up servicing interrupts, it
is recommended to handle the ALERT interrupt as follows:
1. Detect the ALERT assertion.
2. Enter the interrupt handler.
3. Read the status registers to identify the interrupt source.
4. Mask the interrupt source by setting the appropriate mask
bit in the interrupt mask registers (0x12, 0x13).
5. Take the appropriate action for a given interrupt source.
6. Exit the interrupt handler.
7. Periodically poll the status registers. If the interrupt status
bit has cleared, reset the corresponding interrupt mask bit
to 0. This causes the ALERT output and status bits to
behave as shown in Figure 29.
HIGH LIMIT
TEMPERATURE
STICKYSTATUSBIT
INTERRUPTMASK BIT SET
ALERT
INTERRUPT MASK BIT
CLEARED
(ALERT REARMED)
Figure 29. How Masking the Interrupt Source Affects ALERT Output
Masking Interrupt Sources Interrupt Mask Registers 1 and 2 are located at Addresses 0x12
and 0x13. These registers allow individual interrupt sources to
be masked to prevent ALERT interrupts. Masking an interrupt
source prevents only the ALERT output from being asserted;
the appropriate status bit is set as normal.
Table 22. Interrupt Mask Register 1 (Reg. 0x12)
Table 23. Interrupt Mask Register 2 (Reg. 0x13) Measuring PROCHOT Assertion Time The ADT7466 has an internal timer to measure PROCHOT
assertion time. The timer is started on the assertion of the
ADT7466 PROCHOT input, and stopped on the negation of
the pin. The timer counts PROCHOT times cumulatively, that
is, the timer resumes counting on the next PROCHOT
assertion. The PROCHOT timer continues to accumulate
PROCHOT assertion times until the timer is read (it is cleared
on read) or until it reaches full scale. If the counter reaches full
scale, it stops at that reading until it is cleared.
The 8-bit PROCHOT timer register (0x0F) is designed such
that Bit 0 is set to 1 on the first PROCHOT assertion. Once the
cumulative PROCHOT assertion time exceeds 50 ms, Bit 1 of
the PROCHOT timer is set, and Bit 0 becomes the LSB of the
timer with a resolution of 22.76 ms.
PROCHOTTIMER(REG. 0x0F)PROCHOT ASSERTED < OR = 25ms
PROCHOT
ACCUMULATE PROCHOT LOWASSERTION TIMES000010PROCHOTTIMER(REG. 0x0F)PROCHOT ASSERTED > OR = 50ms
PROCHOT
ACCUMULATE PROCHOT LOWASSERTION TIMES000101PROCHOTTIMER(REG. 0x0F)PROCHOT ASSERTED > OR = 125ms
Figure 30. PROCHOT Timer
Figure 30 shows how the PROCHOT timer behaves as the
PROCHOT input is asserted and negated. Bit 0 is set on the first
PROCHOT assertion that is detected. This bit remains set until
the cumulative PROCHOT assertions exceed 50 ms. At this
time, Bit 1 of the PROCHOT timer is set, and Bit 0 is cleared.
Bit 0 now reflects timer readings with a resolution of 25 ms.
When using the PROCHOT timer, be aware of the following.
After a PROCHOT timer read (0x0F): The contents of the timer are cleared on read. The PHOT bit (Bit 1) of Status Register 2 is cleared
automatically.
If the PROCHOT timer is read during a PROCHOT assertion,
the following happens: The contents of the timer are cleared. Bit 0 of the PROCHOT timer is set to 1 (since a
PROCHOT assertion is occurring). The PROCHOT timer increments from 0. If the PROCHOT limit (0x1E) = 0x00, the PHOT bit is set.
Generating ALERT Interrupts from PROCHOT Events The ADT7466 can generate ALERTs when a programmable
PROCHOT limit is exceeded. This allows the systems designer
to ignore brief, infrequent PROCHOT assertions, while
capturing longer PROCHOT events that could signify a more
serious thermal problem within the system. Register 0x1E is the
PROCHOT limit register. This 8-bit register allows a limit from
0 seconds (first PROCHOT assertion) to 6.4 seconds to be set
before an ALERT is generated. The PROCHOT timer value is
compared with the contents of the PROCHOT limit register. If
the PROCHOT timer value exceeds the PROCHOT limit value,
the PHOT bit (Bit 1) of Status Register 2 is set, and an ALERT is
generated. The PHOT bit (Bit 1) of Mask Register 2 (0x13)
masks ALERTs if this bit is set to 1, although the PHOT bit of
Interrupt Status Register 2 is still set if the PROCHOT limit is
exceeded.
Figure 32 is a functional block diagram of the PROCHOT timer
limit and associated circuitry. Writing a value of 0x00 to the
PROCHOT limit register (0x21) causes ALERT to be generated
on the first PROCHOT assertion. A PROCHOT limit value of
0x01 generates an ALERT when cumulative PROCHOT
assertions exceed 50 ms.
