ADS6445IRGCR ,Quad 14-bit 125MSPS ADC with serialized LVDS output 64-VQFN -40 to 85features such as programmable LVDS currents, current doubling modes andinternal termination options ..
ADS6445IRGCT ,Quad 14-bit 125MSPS ADC with serialized LVDS output 64-VQFN -40 to 85This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated cir ..
ADS6445IRGCT ,Quad 14-bit 125MSPS ADC with serialized LVDS output 64-VQFN -40 to 85FEATURES • Pin Compatible 12-Bit Family (ADS642X -SLAS532A)• Maximum Sample Rate: 125 MSPS• Feature ..
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ADS6445IRGCR-ADS6445IRGCT
Quad 14-bit 125MSPS ADC with serialized LVDS output
ADS6445, ADS6444
ADS6443, ADS6442
www.ti.com SLAS531B –MAY 2007–REVISED DECEMBER 2009
QUAD CHANNEL, 14-BIT, 125/105/80/65 MSPS ADC WITH SERIAL LVDS OUTPUTS
Checkfor Samples: ADS6445, ADS6444, ADS6443, ADS6442
1FEATURES • Pin Compatible 12-Bit Family (ADS642X-
SLAS532A)• Maximum Sample Rate: 125 MSPS Feature Compatible Dual Channel Family• 14-Bit Resolution with No Missing Codes (ADS624X- SLAS542A, ADS644X- SLAS543A)• Simultaneous Sample and Hold 3.5dB Coarse Gain and upto 6dB APPLICATIONSProgrammable Fine Gain for SFDR/SNR • Base-StationIF ReceiversTrade-Off • Diversity Receivers• Serialized LVDS Outputs with Programmable • Medical ImagingInternal Termination Option • Test Equipment• Supports Sine, LVCMOS, LVPECL, LVDS Clock
Inputs and Amplitude downto 400 mVPP Table1. ADS64XX Quad Channel Family Internal Reference with External ReferenceSupport• No External Decoupling Required for
References• 3.3-V Analog and Digital Supply 64 QFN Package(9 mm×9 mm)
Table2. Performance Summary
DESCRIPTION (ADS644X)isa familyof high performance 14-bit 125/105/80/65 converters. Serial LVDS data outputs reduce the numberof interface lines, resultingin package(9 mm×9 mm) that allows for high system integration density. The device option that canbe usedto improve SFDR performance with little degradationin SNR. also exist, stepsupto 6dB. datais serialized and output over two LVDS pairs. This makesit (comparedtoa 1-wire interface) and than 1Gbps easing includes the traditional 1-wire interfaceat
frequencies. multiplies the incoming ADC sampling clock the bit from each channel.In additionto the serial streams, outputs. such as programmable LVDS currents, current doubling modes and can be usedto widen eye-openings and improve signal integrity, easing
