ADS62P49IRGCR ,Dual Channel 14 Bit, 250 MSPS ADC with DDR LVDS & Parallel CMOS outputs 64-VQFN -40 to 85FEATURES • Supports Input Clock Amplitude Down to 400mV Differential• Maximum Sample Rate: 250 MSPS ..
ADS62P49IRGCT ,Dual Channel 14 Bit, 250 MSPS ADC with DDR LVDS & Parallel CMOS outputs 64-VQFN -40 to 85MAXIMUM RATINGSover operating free-air temperature range (unless otherwise noted)VALUE UNITSupply v ..
ADS62PF49IRGCT ,Dual Channel 250MSPS Feedback Receiver IC 64-VQFN -40 to 85/productcontent for the latest availabilityinformation and additional product content details.TBD: ..
ADS62PF49IRGCT ,Dual Channel 250MSPS Feedback Receiver IC 64-VQFN -40 to 85FEATURES DESCRIPTIONThe ADS62PF49 is a dual-channel feedback reciever• Maximum Output Sample Rate: ..
ADS6422IRGCT ,Quad 12-bit 65MSPS ADC with serialized LVDS output 64-VQFN -40 to 85FEATURES • Feature Compatible Dual Channel Family(ADS624X - SLAS542A, ADS622X - SLAS543A)• 12-Bit R ..
ADS6423IRGCT ,Quad 12-bit 80MSPS ADC with serialized LVDS output 64-VQFN -40 to 85FEATURES • Feature Compatible Dual Channel Family(ADS624X - SLAS542A, ADS622X - SLAS543A)• 12-Bit R ..
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ADS62P49IRGCR-ADS62P49IRGCT
Dual Channel 14 Bit, 250 MSPS ADC with DDR LVDS & Parallel CMOS outputs
ADS62P49/ ADS62P29
ADS62P48/ ADS62P28
www.ti.com SLAS635B –APRIL 2009–REVISED JANUARY 2011
Dual Channel 14-/12-Bit, 250-/210-MSPS ADC With DDR LVDS and Parallel CMOS Outputs
Checkfor Samples: ADS62P49/ ADS62P29, ADS62P48/ ADS62P28
1FEATURES • Supports Input Clock Amplitude Downto 400
mVPP Differential• Maximum Sample Rate: 250 MSPS Internal and External Reference Support• 14-Bit Resolution– ADS62P49/ADS62P48 64-QFN Package(9 mm×9 mm)• 12-Bit Resolution– ADS62P29/ADS62P28 Total Power: 1.25Wat 250 MSPS ADS62Pxx High Speed Family Double Data Rate (DDR) LVDS and ParallelCMOS Output Options• Programmable Gain upto 6dB for SNR/SFDRTrade-Off• DC Offset Correction 90dB Cross-Talk
DESCRIPTIONThe ADS62Px9/x8isa familyof dual channel 14-bit and 12-bit A/D converters with sampling rates upto 250
MSPS.It combines high dynamic performance and low power consumptionina compact64 QFN package. This
makesit well-suited for multi-carrier, wide band-width communications applications.
The ADS62Px9/x8 has gain options that can be usedto improve SFDR performanceat lower full-scale input
ranges.It includesa dc offset correction loop that can be usedto cancel the ADC offset. Both DDR LVDS
(Double Data Rate) and parallel CMOS digital output interfaces are available. includes internal references while the traditional reference pins and associated decoupling capacitors have
been eliminated. Nevertheless, the device can also be driven with an external reference. The deviceis specified
over the industrial temperature range (–40°Cto 85°C).
Table1. Performance Summary
