ADS6244IRGZR ,Dual 14-bit 105MSPS ADC with serialized LVDS output 48-VQFN -40 to 85features such as programmable LVDS currents, current doubling modes andinternal termination options ..
ADS6244IRGZT ,Dual 14-bit 105MSPS ADC with serialized LVDS output 48-VQFN -40 to 85FEATURES • Pin Compatible 12-Bit Family (ADS622X -SLAS543A)• Maximum Sample Rate: 125 MSPS• Feature ..
ADS6245IRGZR ,Dual 14-bit 125MSPS ADC with serialized LVDS output 48-VQFN -40 to 85features such as programmable LVDS currents, current doubling modes andinternal termination options ..
ADS6245IRGZT ,Dual 14-bit 125MSPS ADC with serialized LVDS output 48-VQFN -40 to 85RECOMMENDED OPERATING CONDITIONSover operating free-air temperature range (unless otherwise noted)M ..
ADS62C15IRGCR ,Dual Channel 11-Bits, 125 MSPS ADC With SNRBoost 64-VQFN -40 to 85FEATURES• Maximum Sample Rate: 125 MSPS• Supports Sine, LVPECL, LVDS and LVCMOSClocks and Amplitude ..
ADS62C15IRGCT ,Dual Channel 11-Bits, 125 MSPS ADC With SNRBoost 64-VQFN -40 to 85MAXIMUM RATINGSVALUE UNITSupply voltage range, AVDD, DRVDD–0.3 V to 3.9 V–0.3 V to 3.9 VVoltage bet ..
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ADS6244IRGZR-ADS6244IRGZT
Dual 14-bit 105MSPS ADC with serialized LVDS output
ADS6245, ADS6244
ADS6243, ADS6242
www.ti.com SLAS542B –MAY 2007–REVISED DECEMBER 2013
DUAL CHANNEL, 14-BIT, 125/105/80/65 MSPS ADC WITH SERIAL LVDS OUTPUTS
Checkfor Samples: ADS6245, ADS6244, ADS6243, ADS6242
1FEATURES • Pin Compatible 12-Bit Family (ADS622X-
SLAS543A)• Maximum Sample Rate: 125 MSPS Feature Compatible Quad Channel Family• 14-Bit Resolution with No Missing Codes (ADS644X- SLAS531A and ADS642X-• Simultaneous Sample and Hold SLAS532A)• 3.5 dB Coarse Gain and upto6 dB
Programmable Fine Gain for SFDR/SNR Trade- APPLICATIONSOff • Base-StationIF Receivers• Serialized LVDS Outputs with Programmable • Diversity ReceiversInternal Termination Option • Medical Imaging• Supports Sine, LVCMOS, LVPECL, LVDS Clock Test EquipmentInputs and Amplitude downto 400 mVpp Internal Reference with External Reference Table1. ADS62XX Dual Channel FamilySupport• No External Decoupling Required forReferences• 3.3-V Analog and Digital Supply• 48 QFN Package(7 mm×7 mm)
Table2. Performance Summary (ADS624X)isa familyof high performance 14-bit 125/105/80/65 MSPS LVDS data outputs reduce the numberof interface lines, resultingina(7 mm× 7mm) that allows for high system integration density. The device includesto improve little degradationin SNR.In gain exist, programmableupto 6dB. each ADC datais serialized and output pairs. This makesit (comparedtoa 1-wire interface) and restrict less than
receiver design. includes the traditional 1-wire interface thatat sampling multiplies the incoming ADC sampling clock the bit data from each channel.In additionto the the frame and outputs.
