ADS6148IRGZR ,Low power 14-bit, 210 MSPS ADC 48-VQFN -40 to 85FEATURESDESCRIPTION• Maximum Sample Rate: 250 MSPS• 14-Bit Resolution – ADS614XADS614X (ADS612X) is ..
ADS6148IRGZT ,Low power 14-bit, 210 MSPS ADC 48-VQFN -40 to 85(1)(2)PACKAGE/ORDERING INFORMATIONSPECIFIEDPACKAGE LEAD/BALL PACKAGE ORDERING TRANSPORTPRODUCT PACK ..
ADS6149IRGZR ,Low power 14-bit, 250 MSPS ADC 48-VQFN -40 to 85MAXIMUM RATINGSVALUE UNITSupply voltage range, AVDD –0.3 V to 3.9 VSupply voltage range, DRVDD –0.3 ..
ADS6149IRGZT ,Low power 14-bit, 250 MSPS ADC 48-VQFN -40 to 85FEATURESDESCRIPTION• Maximum Sample Rate: 250 MSPS• 14-Bit Resolution – ADS614XADS614X (ADS612X) is ..
ADS6149IRGZT ,Low power 14-bit, 250 MSPS ADC 48-VQFN -40 to 85(1)(2)PACKAGE/ORDERING INFORMATIONSPECIFIEDPACKAGE LEAD/BALL PACKAGE ORDERING TRANSPORTPRODUCT PACK ..
ADS61B23IRHBT ,12-bit, 80MSPS ADC with buffered differential inputs 32-VQFN -40 to 85features exist toease data capture—controls for output clock position• Clock Duty Cycle Stabilizera ..
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ADS6148IRGZR-ADS6148IRGZT
Low power 14-bit, 210 MSPS ADC 48-VQFN -40 to 85
1FEATURES
DESCRIPTION
APPLICATIONS
ADS6149/ADS6129
ADS6148/ADS6128
www.ti.com..................................................................................................................................................... SLWS211B–JULY 2008–REVISED OCTOBER 2008
14/12-Bit, 250/210 MSPS ADCs With DDR LVDS and Parallel CMOS Outputs Maximum Sample Rate: 250 MSPS 14-Bit Resolution– ADS614X ADS614X (ADS612X)isa familyof 14-bit (12-bit) A/D
converters with sampling rates upto 250 MSPS.It•
12-Bit Resolution– ADS612X combines high dynamic performance and low power•
687 mW Total Power Dissipationat 250 MSPS consumptionina compact 48 QFN package. This•
Double Data Rate (DDR) LVDS and Parallel makesit well-suited for multicarrier, wide band-width
CMOS Output Options communications applications.
Programmable Fine Gain upto 6dB for ADS614X/2X has fine gain options that can be used
SNR/SFDR Trade-Off to improve SFDR performance at lower full-scale
input ranges.It includesa dc offset correction loop•
DC Offset Correctionthat canbe usedto cancel the ADC offset. Both DDR•
Supports Input Clock Amplitude Downto 400 LVDS (Double Data Rate) and parallel CMOS digital
mVPP Differential output interfaces are available. At lower sampling•
Internal and External Reference Support rates, the ADC automatically operatesat scaled down
power withno lossin performance.•
48-QFN Package (7mm× 7mm) Pin Compatible with ADS5547 Family It includes internal references while the traditional
reference pins and associated decoupling capacitors•
Multicarrier, Wide Band-WidthCommunications•
Wireless Multi-carrier CommunicationsInfrastructureADS614X•
Software Defined Radio ADS6149 ADS614814-Bit Family•
Power Amplifier LinearizationADS612X ADS6129 ADS6128•
802.16d/e 12-Bit Family•
Test and Measurement Instrumentation High Definition Video Medical Imaging Radar Systems