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ADP667ANADN/a234avai+5 V Fixed, Adjustable Low-Dropout Linear Voltage Regulator
ADP667ARADN/a370avai+5 V Fixed, Adjustable Low-Dropout Linear Voltage Regulator


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ADP667AN-ADP667AR
+5 V Fixed, Adjustable Low-Dropout Linear Voltage Regulator
FUNCTIONAL BLOCK DIAGRAM
SHDN
LBO
LBI
GND
SET
OUT

REV.0+5 V Fixed, Adjustable
Low-Dropout Linear Voltage Regulator
FEATURES
Low-Dropout: 150 mV @ 200 mA
Low Power CMOS: 20 mA Quiescent Current
Shutdown Mode: 0.2 mA Quiescent Current
250 mA Output Current
Pin Compatible with MAX667
Stable with 10 mF Load Capacitor
Low Battery Detector
Fixed +5 V or Adjustable Output
+3.5 V to +16.5 V Input Range
Dropout Detector Output
APPLICATIONS
Handheld Instruments
Cellular Telephones
Battery Operated Devices
Portable Equipment
Solar Powered Instruments
High Efficiency Linear Power Supplies
GENERAL DESCRIPTION

The ADP667 is a low-dropout precision voltage regulator that
can supply up to 250 mA output current. It can be used to give
a fixed +5 V output with no additional external components or
can be adjusted from +1.3 V to +16 V using two external resis-
tors. Fixed or adjustable operation is automatically selected via
the SET input. The low quiescent current (20 mA) in conjunc-
tion with the standby or shutdown mode (0.2 mA) makes this
device especially suitable for battery powered systems. The
dropout voltage when supplying 100 mA is only 5 mV allowing
operation with minimal headroom and prolonging the battery
useful life. At higher output current levels the dropout remains
low increasing to just 150 mV when supplying 200 mA. A wide
input voltage range from 3.5 V to 16.5 V is allowable.
Additional features include a dropout detector and a low supply/
battery monitoring comparator. The dropout detector can be
used to signal loss of regulation, while the low battery detector
can be used to monitor the input supply voltage.
The ADP667 is a pin-compatible replacement for the MAX667.
It is specified over the industrial temperature range –40°C to
+85°C and is available in an 8-pin DIP and in narrow surface
mount (SOIC) packages.
ORDERING GUIDE
TYPICAL OPERATING CIRCUIT
+5V
OUTPUT+6V
INPUT

© Analog Devices, Inc., 1995
ADP667–SPECIFICATIONS
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*

(TA= +25°C unless otherwise noted)
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+18 V
Output Short Circuit to GND Duration . . . . . . . . . . . . . .1 sec
LBO Output Sink Current . . . . . . . . . . . . . . . . . . . . . . .50 mA
LBO Output Voltage . . . . . . . . . . . . . . . . . . . . .GND to VOUT
SHDN Input Voltage . . . . . . . . . . . . . . . .–0.3 V (VIN + 0.3 V)
LBI, SET Input Voltage . . . . . . . . . . . . .–0.3 V (VIN + 0.3 V)
Power Dissipation, N-8 . . . . . . . . . . . . . . . . . . . . . . . .625 mW
(Derate 8.3 mW/°C above +50°C)
Power Dissipation, SO-8 . . . . . . . . . . . . . . . . . . . . . . .450 mW
(Derate 6 mW/°C above +50°C)JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . .170°C/W
Operating Temperature Range
Industrial (A Version) . . . . . . . . . . . . . . . . . .–40°C to +85°C
Storage Temperature Range . . . . . . . . . . . .–65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . .+300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . .+215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . .+220°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .> 6000 V
(VIN = +9 V, GND = 0 V, VOUT = +5 V, CL = 10 mF, TA = TMIN to TMAX unless
otherwise noted)
PIN FUNCTION DESCRIPTION
GND
LBI
LBO
SHDN
SET
OUT
DIP & SOIC PIN CONFIGURATION
TERMINOLOGY
Dropout Voltage:
The input/output voltage differential at
which the regulator no longer maintains regulation against fur-
ther reductions in input voltage. It is measured when the output
decreases 100 mV from its nominal value. The nominal value is
the measured value with VIN = VOUT +2 V.
Line Regulation:
The change in output voltage as a result of a
change in the input voltage. It is specified for a change of input
voltage from 6 V to 10 V.
Load Regulation:
The change in output voltage for a change
in output current. It is specified for an output current change
from 10 mA to 200 mA.
Quiescent Current (IGND):
The input bias current which
flows into the regulator not including load current. It is mea-
sured on the GND line and is specified in shutdown and also for
different values of load current.
Shutdown:
The regulator is disabled and power consumption
is minimized.
Dropout Detector:
An output that indicates that the regulator
is dropping out of regulation.
Maximum Power Dissipation:
The maximum total device
dissipation for which the regulator will continue to operate
within specifications.
GENERAL INFORMATION

The ADP667 contains a micropower bandgap reference voltage
source, an error amplifier A1, two comparators (C1, C2) and a
series PNP output pass transistor.
CIRCUIT DESCRIPTION

The internal bandgap voltage reference is trimmed to 1.255V
and is used as a reference input to the error amplifier A1.The
feedback signal from the regulator output is supplied to the
other input by an on-chip voltage divider or by two external
resistors.When the SET input is at ground, the internal divider
provides the error amplifier’s feedback signal giving a +5V out-
put. When SET is at more than 50 mV above ground, compara-
tor C1 switches the error amplifier’s input directly to the SET
pin, and external resistors are used to set the output voltage.
The external resistors are selected so that the desired output
voltage gives 1.255 V at the SET input.
The output from the error amplifier supplies base current to the
PNP output pass transistor which provides output current. Up
to 250mA output current is available provided that the device
power dissipation is not exceeded.
Comparator C2 compares the voltage on the Low Battery Input,
LBI, pin to the internal +1.255V reference voltage. The output
from the comparator drives an open drain FET connected to the
Low Battery Output pin, LBO. The Low Battery Threshold
may be set using a suitable voltage divider connected to LBI.
When the voltage on LBI falls below 1.255V, the open drain
output, LBO, is pulled low.
A shutdown (SHDN) input that can be used to disable the
error amplifier and hence the voltage output is also available.
The supply current in shutdown is less than 1mA.
Figure 1.ADP667 Functional Block Diagram
ADP667
APPLICATIONS INFORMATION
Circuit Configurations

For a fixed +5 V output the SET input should be grounded, and
no external resistors are necessary. This basic configuration is
shown in Figure 2. The input voltage can range from +5.15 V
to +16.5 V, and output currents up to 250 mA are available
provided that the maximum package power dissipation is not
exceeded.
+5V
OUTPUT

Figure 2.Fixed +5 V Output Circuit
Output Voltage Setting

If the SET input is connected to a resistor divider network, the
output voltage is set according to the following equation:
where VSET = 1.255 V.
VIN
VOUT

Figure 3.Adjustable Output Circuit
The resistor values may be selected by first choosing a value for
R1 and then selecting R2 according to the following equation:
The input leakage current on SET is 10nA maximum. This
allows large resistor values to be chosen for R1 and R2 with
little degradation in accuracy. For example, a 1 MW resistor
may be selected for R1, and then R2 may be calculated accord-
ingly. The tolerance on SET is guaranteed at less than –25mV,
so in most applications fixed resistors will be suitable.
Shutdown Input (SHDN)

The SHDN input allows the regulator to be switched off with a
logic level signal. This will disable the output and reduce the
current drain to a low quiescent (1mA maximum) current. This
is very useful for low power applications. Driving the SHDN in-
put to greater than 1.5V places the part in shutdown.
If the shutdown function is not being used, then SHDN should
be connected to GND.
Low Supply or Low Battery Detection

The ADP667 contains on-chip circuitry for low power supply or
battery detection. If the voltage on the LBI pin falls below the
internal 1.255 V reference, then the open drain output LBO will
go low. The low threshold voltage may be set to any voltage
above 1.255V by appropriate resistor divider selection.
where R3 and R4 are the resistive divider resistors and VBATT is
the desired low voltage threshold.
Since the LBI input leakage current is less than 10 nA, large val-
ues may be selected for R3 and R4 in order to minimize loading.
For example, a 6 V low threshold, may be set using 10 MW for
R3 and 2.7 MW for R4.
The LBO output is an open-drain output that goes low sinking
current when LBI is less than 1.255V. A pull-up resistor ofkW or greater may be used to obtain a logic output level with
the pull-up resistor connected to VOUT.
VINLOW BATTERY
STATUS OUTPUT
VOUT

Figure 4.Low Battery/Supply Detect Circuit
Dropout Detector
The ADP667 features an extremely low dropout voltage making
it suitable for low voltage systems where headroom is limited.A
dropout detector is also provided. The dropout detector output,
DD, changes as the dropout voltage approaches its limit. This is
useful for warning that regulation can no longer be maintained.
The dropout detector output is an open collector output from a
PNP transistor. Under normal operating conditions with the in-
put voltage more than 300mV above the output, the PNP tran-
sistor is off and no current flows out the DD pin. As the voltage
differential reduces to less than 300mV, the transistor switches
on and current is sourced. This condition indicates that regulation
can no longer be maintained. Please refer to Figure 10 in the
“Typical Performance Characteristics.” The current output can
be translated into a voltage output by connecting a resistor from
DD to GND.A resistor value of 100kW is suitable. A digital
status signal can be obtained using a comparator. The on-chip
comparator LBI may be used if it is not being used to monitor a
battery voltage. This is illustrated in Figure 5.
+5V
OUTPUT
DROPOUT
STATUS
OUTPUT
VIN

Figure 5.Dropout Status Output
Output Capacitor Selection

An output capacitor is required on the ADP667 to maintain
stability and also to improve the load transient response. Ca-
pacitor values from 10 mF upwards are suitable. All specifica-
tions are tested and guaranteed with 10 mF. Capacitors larger
than 10 mF will further improve the dynamic transient response
characteristics of the regulator. Tantalum or aluminum electro-
lytics are suitable for most applications. For temperatures below
about –25°C, solid tantalums should be used as many alumi-
num electrolytes freeze at this temperature.
Quiescent Current Considerations

The ADP667 uses a PNP output stage to achieve low dropout
voltages combined with high output current capability. Under
normal regulating conditions the quiescent current is extremely
low. However if the input voltage drops so that it is below the
desired output voltage, the quiescent current increases consider-
ably. This happens because regulation can no longer be main-
tained and large base current flows in the PNP output transistor
in an attempt to hold it fully on. For minimum quiescent cur-
rent, it is therefore important that the input voltage is main-
tained higher than the desired output level. If the device is being
powered using a battery that can discharge down below the rec-
ommended level, there are a couple of techniques that can be
applied to reduce the quiescent current, but at the expense of
dropout voltage. The first of these is illustrated in Figure 6. By
connecting DD to SHDN the regulator is partially disabled with
input voltages below the desired output voltage and therefore
the quiescent current is reduced considerably.
+5V
OUTPUT
VIN
0.1µF

Figure 6.IQ Reduction 1
Another technique for reducing the quiescent current near drop-
out is illustrated in Figure 7. The DD output is used to modify
the output voltage so that as VIN drops, the desired output volt-
age setpoint also drops. This technique only works when exter-
nal resistors are used to set the output voltage. With VINgreater
than VOUT, DD has no effect. As VINreduces and dropout is
reached, the DD output starts sourcing current into the SET
input through R3. This increases the SET voltage so that the
regulator feedback loop does not drive the internal PNP transis-
tor as hard as it otherwise would.As the input voltage continues
to decrease, more current is sourced, thereby reducing the PNP
drive even further. The advantage of this scheme is that it main-
tains a low quiescent current down to very low values of VINat
which point the batteries are well outside their useful operating
range. The output voltage tracks the input voltage minus the
dropout. The SHDN function is also unaffected and may be
used normally if desired.
+5V
OUTPUT
1MWVIN

Figure 7.IQ Reduction 2
ADP667–Typical Performance Characteristics
LOAD CURRENT – mA
DROPOUT VOLTAGE – mV

Figure 8.Dropout Voltage vs. Load Current
IOUT – mA
QUIESCENT CURRENT – mA

Figure 9.Quiescent Current vs. Load Current
I-O DIFFERENCE – mV
DD OUTPUT CURRENT – µA
0.100.150.200.250.300.350.40

Figure 10.DD Output Current vs. I-O DifferentialI – mA
0.00200

V – mV100150
0.5

Figure 11.Load Regulation (DVOUT vs. DIOUT)
CH12.00V200mVM 2.00ms
+10V
+6V
VIN
VOUT
200mV

Figure 12.Dynamic Response to Input Change
CH11.00V20.0mVM 2.00ms
100mA
10mA
OUTPUT
CURRENT
VOUT
20mV
0mV

Figure 13.Dynamic Response to Load Change
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