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ADP3804JRU-12.5-RL
High Frequency Switch Mode Li-Ion Battery Charger
REV.PrI12/5/00
PRELIMINAR
TECHNICALDATA
High Frequency Switch Mode
Li-Ion Battery ChargerGENERAL DESCRIPTION
The ADP3804 is a complete Li-Ion battery charging IC. The
device combines high output voltage accuracy with constant
current control to simplify the implementation of Constant-
Current, Constant-Voltage (CCCV) chargers. The ADP3804 is
available in two options. The ADP3804-12.6 guarantees the
final battery voltage to 12.6 V ± 0.6%, the ADP3804-12.5
guarantees 12.525 V ± 0.6% and the ADP3804 is adjustable
using two external resistors to set the battery voltage. The
current sense amplifier has rail-to-rail inputs to accurately
operate under low drop out and short circuit conditions. The
charge current is programmable with a DC voltage on ISET. A
second differential amplifier senses the system current across an
external sense resistor and outputs a linear voltage on the ISYS
pin. The boosted synchronous driver allows the use of two
NMOS transistors for lower system cost.
FEATURESLi-Ion Battery ChargerLi-Ion Battery ChargerLi-Ion Battery ChargerLi-Ion Battery ChargerLi-Ion Battery Charger
Fixed 12,525 V, 12.600 V, or Adjustable BatteryFixed 12,525 V, 12.600 V, or Adjustable BatteryFixed 12,525 V, 12.600 V, or Adjustable BatteryFixed 12,525 V, 12.600 V, or Adjustable BatteryFixed 12,525 V, 12.600 V, or Adjustable Battery
VoltageVoltageVoltageVoltageVoltage
High End-of-Charge Voltage AccuracyHigh End-of-Charge Voltage AccuracyHigh End-of-Charge Voltage AccuracyHigh End-of-Charge Voltage AccuracyHigh End-of-Charge Voltage Accuracy����0.4% @ +250.4% @ +250.4% @ +250.4% @ +250.4% @ +25�����CCCCC����0.6% @ 50.6% @ 50.6% @ 50.6% @ 50.6% @ 5�����C to 55C to 55C to 55C to 55C to 55�����CCCCC����0.75% @ 00.75% @ 00.75% @ 00.75% @ 00.75% @ 0�����C to 85C to 85C to 85C to 85C to 85�����CCCCC
Programmable Charge Current withProgrammable Charge Current withProgrammable Charge Current withProgrammable Charge Current withProgrammable Charge Current with
Rail-to-Rail SensingRail-to-Rail SensingRail-to-Rail SensingRail-to-Rail SensingRail-to-Rail Sensing
System Current Sense with Reverse Input ProtectionSystem Current Sense with Reverse Input ProtectionSystem Current Sense with Reverse Input ProtectionSystem Current Sense with Reverse Input ProtectionSystem Current Sense with Reverse Input Protection
Softstart Charge CurrentSoftstart Charge CurrentSoftstart Charge CurrentSoftstart Charge CurrentSoftstart Charge Current
Undervoltage LockoutUndervoltage LockoutUndervoltage LockoutUndervoltage LockoutUndervoltage Lockout
Boosted Synchronous Drive For External NMOSBoosted Synchronous Drive For External NMOSBoosted Synchronous Drive For External NMOSBoosted Synchronous Drive For External NMOSBoosted Synchronous Drive For External NMOS
Programmable Oscillator FrequencyProgrammable Oscillator FrequencyProgrammable Oscillator FrequencyProgrammable Oscillator FrequencyProgrammable Oscillator Frequency
Oscillator SYNC PinOscillator SYNC PinOscillator SYNC PinOscillator SYNC PinOscillator SYNC Pin
Constant Current/Constant Voltage FlagConstant Current/Constant Voltage FlagConstant Current/Constant Voltage FlagConstant Current/Constant Voltage FlagConstant Current/Constant Voltage Flag
Trickle ChargeTrickle ChargeTrickle ChargeTrickle ChargeTrickle Charge
APPLICATIONSPortable ComputersPortable ComputersPortable ComputersPortable ComputersPortable Computers
Fast ChargersFast ChargersFast ChargersFast ChargersFast Chargers
FUNCTIONAL BLOCK DIAGRAMFUNCTIONAL BLOCK DIAGRAMFUNCTIONAL BLOCK DIAGRAMFUNCTIONAL BLOCK DIAGRAMFUNCTIONAL BLOCK DIAGRAM
COMP
REG
VCCBSTREGBSTDRVHSWDRVLPGND
AGND
LIMIT
ISYS
ISET
BAT
ADJ
REF
SYNCCCCV
CS+SYSCSSYS+
ADP3804–SPECIFICATIONS1
(@ 0�C � TA ��100�C, VCC =16 V, unless otherwise noted)
ADP3804 All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.Guaranteed by design, not tested in production. If SYNC function is used, then fSYNC must be greater than fCT, but less than 120% of fCT.VCS = (VCS+) – (VCS–).Accuracy guaranteed by ISET INPUT, Programming Function Accuracy specification. System current sense is active during shutdown. Load current is supplied through SYS+ pin. VBAT < 95% of final or VCS > 80% of ISET programmed value. VBAT ������95% of final and VCS ������80% of ISET programmed value.
Specifications subject to change without notice.
ADP3804
PRELIMINAR
TECHNICALDA
ABSOLUTE MAXIMUM RATINGS*Input Voltage (VCC to GND) . . . . . . . . . . .–0.3V to +25 V
BAT, CS+, CS– to GND . . . . . . . . . . . .–0.3 V to VCC+0.3 V
SYS+, SYS– to GND . . . . . . . . . . . . . . . . . . . .–25 V to +25 V
BST to PGND . . . . . . . . . . . . . . . . . . . . . . .–0.3V to +30 V
BST to SW . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3V to +8 V
SW to PGND . . . . . . . . . . . . . . . . . . . . . . . . . .–4 V to +25 V
DRVL to PGND . . . . . . . . . . . . . . . . . . . . . . .–0.3V to +8 V
ISET, ADJ, CCCV, SD, SYNC, CT,
LIMIT, ISYS TO GND . . . . . . . . . . . . . . . .–0.3V to +10 V
COMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3V to +3 V
GND to PGND . . . . . . . . . . . . . . . . . . . . . . .–0.3V to +0.3 V
Operating Ambient Temperature Range . . . . . . 0°C to 100°C
�JA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115°C/W
Operating Junction Temperature Range . . . . .0°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering 10 sec) . . . . . . +300°C
NOTES
*This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operation section of this specifi-
cation is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
�JA is specified for worst case conditions with device soldered on a circuit board.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
device features proprietary ESD protection circuitry, permanent damage may occur on devices
PIN FUNCTION DESCRIPTIONSPIN CONFIGURATION
24 Lead TSSOP
ORDERING GUIDE
�����������
Figure 1.Typical Application
THEORY OF OPERATIONThe ADP3804 combines a boosted synchronous switching
driver with programmable current control and accurate final
battery voltage control in a Constant Current, Constant Volt-
age (CCCV) Li-Ion battery charger. High accuracy voltage
control is needed to safely charge Li-Ion batteries, which are
typically specified at 4.2 V ± 1% per cell. For a typical note-
book computer battery pack, three cells are in series giving a
total voltage of 12.6 V. The ADP3804 is available in three
versions, a fixed 12.525 V output, a fixed 12.6 V output and an
adjustable output. The adjustable output is useful for charging
batteries with slightly different chemistry that result in a final
battery voltage slightly higher or lower than 4.2 V/ cell.
Another requirement for safely charging Li-Ion batteries is
accurate control of the charge current. The actual charge cur-
rent depends on the number of cells in parallel within the bat-
tery pack. Typically this is in the range of 2 A to 3 A. The
ADP3804 provides flexibility in programming the charge cur-
rent over a wide range. An external resistor is used to sense the
charge current and this voltage is compared to a DC input
voltage. This programmability allows the current to be changed
amount of heat generated in the charger, but also to stay within
the power limits of the AC adapter. With the addition of a
boosted high side driver, the ADP3804 drives two external
power NMOS transistors for a simple, lower cost power stage.
The ADP3804 also provides an uncommitted current sense
amplifier. This amplifier provides an analog output pin for
monitoring the current through an external sense resistor. The
amplifier can be used anywhere in the system that high side
current sensing is needed.
Charge Current ControlAMP1 in Figure 1 has a differential input to amplify the voltage
drop across an external sense resistor RCS. The input common
mode range is from ground to VCC allowing current control in
short circuit and low drop-out conditions. The gain of AMP1 is
internally set to 25 V/V for low voltage drop across the sense
resistor. During CC mode, gm1 forces the voltage at the output
of AMP1 to be equal to the external voltage at the ISET pin.
By choosing RCS and VISET appropriately, a wide range of
charge currents can be programmed:
ADP3804
PRELIMINAR
TECHNICALDATATypical values of RCS are in the range from 25 m� to 50 m�,
and the input range of ISET is from 0 V to 4 V. If, for example,
a 2 A charger is required, then RCS could be set to 50 m� and
VISET = 2.5 V. The power dissipation in RCS should be kept
below 500 mW. In this example, the power is a maximum of
200 mW. Once RCS has been chosen, the charge current can be
adjusted during operation with VISET. Lowering VISET to
125 mV gives a charge current of 100 mA for trickle charging.
Components R3, R4, and C13 provide high frequency filtering
for the current sense signal.
Final Battery Voltage ControlAs the battery approaches its final voltage, the ADP3804
switches from CC mode to CV mode. The change is achieved
by the common output node of gm1 and gm2. Only one of the
two outputs controls the voltage at the COMP pin. Both ampli-
fiers can only pull down on COMP, such that when either
amplifier has a positive differential input voltage, its output is
not active. For example, when the battery voltage, VBAT, is low,
gm2 does not control VCOMP. When the battery voltage reaches
the desired final voltage, gm2 takes control of the loop, and the
charge current is reduced.
Amplifier gm2 compares the battery voltage to the internal refer-
ence voltage of 2.5 V. In the case of the ADP3804-12.5 and
ADP3804-12.6, an internal resistor divider sets the final battery
voltage to 12.6 V. In contrast, the ADP3804 requires external,
precision resistors. The divider ratio should be set to divide the
desired final voltage down to 2.5 V at the BAT pin:(2)
These resistors should be high impedance to limit the battery
leakage current. Alternatively, an external NMOS can be added
in series with R12 to turn off during shutdown. In the case of
the ADP3804-12.5 and ADP3804-12.6, an internal MOSFET
disconnects the internal divider to reduce the leakage current
into BAT to less than 1 µA during shutdown. If the ADP3804-
12.5 or ADP3804-12.6 is used, then R11 should be shorted
and R12 open. The reference and internal resistor divider are
referenced to the AGND pin, which should be connected close
to the negative terminal of the battery to minimize sensing
errors.
Final Battery Voltage AdjustThe ADJ pin provides an analog input to adjust the final bat-
tery voltage by ± 5%. Figure 2 shows the control curve for this
amplifier. Above the threshold voltage of 4.6 V, the amplifier is
turned off. Thus, to disable this function, ADJ should be con-
nected to REG. In the linear range between 1 V and 4 V, the
percentage change in VBAT is a function VADJ as follows:(3)
This percent change is the same for the ADP3804 (2.5 V out-
put) and the ADP3804-12.6.
Oscillator and PWMThe oscillator generates a triangle waveform between 1 V and
approximately 200 nsec to ensure that the boost capacitor is
always charged. This off time sets the maximum duty cycle.
For example, a 200 kHz frequency (5 µsec period) gives a
maximum duty cycle of 96%.
The oscillator frequency is set by the external capacitor at the
CT pin and the internal current source of 150 µA according to
the following formula:���
21.5OSCfCTV(4)
A 200 pF capacitor sets the frequency to 250 kHz. The fre-
quency can also be synchronized to an external oscillator by
applying a square wave input on SYNC. The SYNC function is
designed to allow only increases in the oscillator frequency.
The fSYNC should be no more than 20% higher than fOSC. The
duty cycle of the SYNC input is not important and can be
anywhere between 5% and 95%.
7V Boost RegulatorThe driver stage is powered by the internal 7V boost regulator,
which is available at the BSTREG pin. Because the switching
currents are supplied by this regulator, decoupling must be
added. A 0.1 µF capacitor should be placed close to the
ADP3804, with the ground side connected close to the power
ground pin, PGND. This supply is not recommended for use
externally due to high switching noise.
Boosted Synchronous DriverThe PWM comparator controls the state of the synchronous
driver. A high output from the PWM comparator forces DRVH
on and DRVL off. The drivers have an ON resistance of ap-
proximately 5 � for fast rise and fall times when driving exter-
nal MOSFETs. Furthermore, the boosted drive allows an
external NMOS transistor for the main switch instead of a
PMOS. A boost diode is internally connected between
BSTREG and BST, and a boost capacitor of 0.1 µF must be
added externally between BST and SW. The voltage between
BST and SW is typically 6 V.
The DRVL pin switches between BSTREG and PGND. The 7
V output of BSTREG drives the external NMOS with high
VGS to lower the ON resistance. PGND should be connected
close to the source pin of the external synchronous NMOS.
When DRVL is high, this turns on the lower NMOS and pulls
the SW node to ground. At this point, the boost capacitor is
charged up through the internal boost diode. When the PWM
switches high, DRVL is turned off and DRVH turns on.
DRVH switches between BST and SW. When DRVH is on,
the SW pin is pulled up to the input supply (typically 16 V),
and BST rises above this voltage by approximately 6 V.
Overlap protection is included in the driver to ensure that both
external MOSFETs are not on at the same time. When DRVH
turns off the upper MOSFET, the SW node goes low due to
the inductor current. The ADP3804 monitors the SW voltage,
and turns on DRVL when SW goes below 1 V. If, under low
current loads, the SW voltage does not drop below 1 V, DRVL
will turn on after time-out of 200 nsec. When DRVL turns off,
an internal timer adds a delay of 50 nsec before turning DRVH
on.
