ADP3610ARU Fast Delivery |IC PHOENIX CO.,LIMITED

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ADP3610ARU
320 mA Switched Capacitor Voltage Doubler
REV.A
320 mA Switched Capacitor
Voltage Doubler
FEATURES
Push-Pull Charge Pump Doubler Reduces Output Ripple
+3.0 V to +3.6 V Operation
VOUT > +5.4 V @ 320 mA Maximum Load
Output Impedance, RTOTAL ≤ 1.66 V
Shutdown Capability
Overvoltage Protection: VIN > +4 V
Operating Temperature Range: –208C to +858C
Thermally Enhanced 16-Lead TSSOP Package
APPLICATIONS
High Current Doublers
LCD Panels
Cellular Phones
Inductorless Boost Converters
GENERAL DESCRIPTION
The ADP3610 is a push-pull switched-capacitor converter volt-
age doubler. The term “push-pull” refers to two charge pumps
working in parallel and in opposing phase to deliver charge to
support the output voltage. When one capacitor is pumping
charge to the output, the other is recharging. This technique
minimizes voltage loss and output voltage ripple.
The converter accommodates input voltages from +3 V to
+3.6V and can provide 320 mA using 2.2 μF MLCC pump
capacitors. Converter operation can be enabled or disabled
simply by an input signal. The package is enhanced with Analog
Devices’ proprietary Thermal Coastline feature, which allows
up to 980 mW of power dissipation at room temperature. The
exceptionally thin TSSOP-16 package and the requirement of
only capacitors (no inductors) to support the converter opera-
tion allows slim designs, e.g., for TFT or LCD display panels.
Figure 1.Typical Application Circuit
FUNCTIONAL BLOCK DIAGRAM
VIN
GND
VOUT
CM2CP2CM1CP1
ADP3610–SPECIFICATIONS
NOTESCapacitors in the test circuit are multilayer ceramic type.All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.Junction temperature is influenced by ambient temperature, device mounting and heatsinking, and power dissipation which is a function of I/O voltages and load.RTOTAL includes the switch resistance, and the equivalent series resistance of the 2.2 μF (X7R) MLCC pump capacitors.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS1
Input Voltage (V+ to GND) . . . . . . . . . . . . . . . . . . . . +4.0 V
Output Short Circuit to GND (<1 A) . . . . . . . . . . . . . .60 sec
Power Dissipation
qJA2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+102°C/W
Operating Ambient Temperature Range . . . .–20°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . +300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
NOTESThis is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged.qJA is specified for worst case conditions with device soldered on a FR-4, 1 oz.
copper clad four layer circuit board.
ORDERING GUIDE
(–208C ≤ TA ≤ +858C, VIN = +3.3 V, CP1 = CP2 = 2.2 mF, CO = 1 mF, SD = GND,
unless otherwise noted)1, 2, 3
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3610 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
PIN CONFIGURATION
VIN
CM1
GND
GND
GND
CM2
VIN
VIN
VIN
CP1
GND
VOUT
VOUT
CP2
VIN
Table I.Other Members of ADP36xx Family1
NOTESSee individual data sheets for detailed ordering information.SO = Small Outline; TSSOP = Thin Shrink Small Outline Package.
Table II.Alternative Capacitor Technologies
*Refer to capacitor manufacturer’s data sheet for operation below 0°C.
Table III.Recommended Capacitor Manufacturers
PIN FUNCTION DESCRIPTIONS
ADP3610
TEMPERATURE – 8C
OUTPUT VOLTAGE – Volts
6.62
Figure 4.Output Voltage vs.
Temperature, VIN = +3.3 V
LOAD CURRENT – mA
OUTPUT VOLTAGE – Volts
5.7
Figure 7.Output Voltage vs. Load
Current for VIN = +3.0 V␣
SUPPLY VOLTAGE – Volts
OSCILLATOR FREQUENCY – kHz
2.93.03.13.23.33.43.5
Figure 2.Oscillator Frequency vs.
Supply Voltage
TEMPERATURE – 8C
OSCILLATOR FREQUENCY – kHz
570
Figure 5.Oscillator Frequency vs.
Temperature
LOAD CURRENT – mA
OUTPUT VOLTAGE – Volts
6.3
Figure 8.Output Voltage vs. Load
Current for VIN = +3.3 V
TEMPERATURE – 8C
SUPPLY CURRENT – mA
9.7
Figure 3.Supply Current vs.
Temperature
TEMPERATURE – 8C
SUPPLY CURRENT –
0.6
Figure 6.Supply Current in Shutdown
Mode vs. Temperature
LOAD CURRENT – mA
OUTPUT VOLTAGE – Volts
6.9
Figure 9.Output Voltage vs. Load
Current for VIN = +3.6 V
–Typical Performance Characteristics
VIN – Volts
QUIESCENT CURRENT – I
(mA)
Figure 10.Quiescent Current vs.
Input Voltage
LOAD CURRENT – mA
EFFICIENCY – %
Figure 11.Efficiency vs. Load Current,
VIN = +3.3 V
Figure 12.Output Voltage Ripple (IO =
320 mA, CP1 = CP2 = 2.2 μF, CO = 1 μF)
VOUT
VIN
Figure 13.Start-Up Under Full Load
(VIN = +3.6 V, IO = 320 mA)
10V
Figure 14.Shutdown at Full Load
(VIN = +3.3 V, IO = 320 mA)
ADP3610
THEORY OF OPERATION
The ADP3610 is an unregulated switched capacitor voltage
doubler that provides an output voltage greater than 5.4 V from
a +3.0 V to +3.6 V input. The unique push-pull voltage dou-
bling architecture allows it to deliver a maximum of 320 mA
output current. A typical application circuit, as shown in Figure
20, requires five small external capacitors. The ADP3610 has an
internal 1 MHz oscillator that is divided by two and used to
generate two nonoverlapping phase clocks.
The basic principle behind a conventional switched capacitor
voltage doubler is shown in Figure 15. During phase one, S1
and S2 are ON, charging the pump capacitor to the input volt-
age. In phase two, switches S1 and S2 are turned OFF and S3
and S4 are turned ON. During phase two, the pump capacitor
is placed in series with the input voltage, thereby charging the
output capacitor to the sum of input voltage and pump ca-
pacitor voltage, resulting in voltage doubling at the output
terminal.
Figure 15.Conventional Voltage Doubler Configuration
The ADP3610 has two sets of switched capacitor voltage dou-
blers connected in parallel delivering charge to the output as
shown in Figure 16.
Figure 16.Switch Configuration Charging the Pump
Capacitor
The two voltage doublers run in opposite phases, i.e., when one
pump capacitor is being charged, the other is charging the out-
put, as shown in Figure 17. In this architecture, one of the
pump capacitors is always delivering charge to the output. As a
result, output ripple is at a frequency that is double the switch-
ing frequency. This allows the use of a smaller output capacitor
compared to a conventional voltage doubler.
PHASE 1
(a)
VINVOUTAfB
PHASE 2
(b)B
VOUT
VINfAS7
Figure 17.(a) Phase 1 “Push” Charging␣
(b) Phase 2 “Pull” Charging
Overvoltage Protection
The input voltage is scaled with a resistor network and com-
pared to the bandgap reference voltage of 1.25 V by a 50 mV
hysteresis comparator. When the input voltage exceeds 4.0 V,
the overvoltage protection signal stops the oscillator.
VIN
Figure 18.Overvoltage Protection
Shutdown Mode
The ADP3610’s output can be disabled by pulling the SD pin
high to a TTL/CMOS logic compatible level which will stop the
internal oscillator. In shutdown mode, all analog circuitry in-
cluding overvoltage protection is shut off, thereby reducing the
quiescent current to 10 μA typical. Applying a digital low level
or tying the SD pin to ground will turn on the output. If the
shutdown feature is not used, SD pin should be tied to the
ground pin. The output voltage in shutdown mode is approxi-
mately VIN – 0.6 V.

Partno	Mfg	Dc	Qty	Available	Descript
ADP3610ARU	ADI	N/a	23	avai	320 mA Switched Capacitor Voltage Doubler
ADP3610ARU	AD	N/a	47	avai	320 mA Switched Capacitor Voltage Doubler