ADP3417JR-REEL ,Dual Bootstrapped MOSFET DriverSPECIFICATIONSAParameter Symbol Conditions Min Typ Max UnitSUPPLYSupply Voltage Range VCC 4.15 13.2 ..
ADP3417JR-REEL7 ,Dual Bootstrapped MOSFET Driverspecifications are guaranteed by characterization but not production tested.4For propagation delays ..
ADP3418 ,Dual Boostrapped 12 V MOSFET Driver with Output DisableGENERAL DESCRIPTION ADP3418The ADP3418 is a dual high-voltage MOSFET driverPGNDoptimized for drivin ..
ADP3418 ,Dual Boostrapped 12 V MOSFET Driver with Output DisableSPECIFICATIONSAParameter Symbol Conditions Min Typ Max UnitsSUPPLYSupply Voltage Range V 4.15 13.2 ..
ADP3418 ,Dual Boostrapped 12 V MOSFET Driver with Output DisableSpecifications subject to change without notice.ABSOLUTE MAXIMUM RATINGS* PIN CONFIGURATIONVCC .... ..
ADP3418JR ,Dual Boostrapped 12 V MOSFET Driver with Output DisableAPPLICATIONS protection to prevent shoot-through current in the external Multiphase desktop CPU sup ..
AK4538VN , 16Bit DS CODEC with MIC/HP/SPK-AMP
AK4541VQ , AC’97 Rev 2.1 Multimedia Audio CODEC
AK4545VQ , AC97 AUDIO CODEC WITH SRC AND DIT
AK4545VQ , AC97 AUDIO CODEC WITH SRC AND DIT
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ADP3417JR-ADP3417JR-REEL-ADP3417JR-REEL7
Dual Bootstrapped MOSFET Driver
REV.A
Dual Bootstrapped
MOSFET Driver
FUNCTIONAL BLOCK DIAGRAM
VCC
BST
DRVH
DRVL
PGND
FEATURES
All-In-One Synchronous Buck Driver
Bootstrapped High Side Drive
One PWM Signal Generates Both Drives
Anticross-Conduction Protection Circuitry
APPLICATIONS
Multiphase Desktop CPU Supplies
Single-Supply Synchronous Buck Converters
Standard-to-Synchronous Converter Adaptations
GENERAL DESCRIPTIONThe ADP3417 is a dual MOSFET driver optimized for driving
two N-channel MOSFETs which are the two switches in a
nonisolated synchronous buck power converter. Each of the
drivers is capable of driving a 3000pF load with a 20ns propa-
gation delay and a 30ns transition time. One of the drivers can
be bootstrapped and is designed to handle the high voltage
slew rate associated with “floating” high side gate drivers.
The ADP3417 includes overlapping drive protection (ODP)
to prevent shoot-through current in the external MOSFETs.
The ADP3417 is specified over the commercial temperature
range of 0°C to 70°C and is available in an 8-lead SOIC package.
Figure 1.General Application Circuit
ADP3417–SPECIFICATIONS1NOTES
1All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.
2Logic inputs meet typical CMOS I/O conditions for source/sink current (~1 µA).
3AC specifications are guaranteed by characterization but not production tested.
4For propagation delays, “TPDH” refers to the specified signal going high; “TPDL” refers to it going low.
Specifications subject to change without notice.
(VCC = 12 V, BST = 4 V to 26 V, TA = 0�C to 70�C, unless otherwise noted.)
ABSOLUTE MAXIMUM RATINGS*VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +15 V
BST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +30 V
BST to SW . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +15 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –5.0 V to +25 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VCC + 0.3 V
Operating Ambient Temperature Range . . . . . . . 0°C to 70°C
Operating Junction Temperature Range . . . . . . 0°C to 125°C
θJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123°C/W
θJC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C/W
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . 300°C
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged. Unless otherwise specified, all voltages are referenced
to PGND.
PIN CONFIGURATION
PIN FUNCTION DESCRIPTIONS
ORDERING GUIDE
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADP3417 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
ADP3417Figure 2.Nonoverlap Timing Diagram (Timing Is Referenced to the 90% and 10% Points Unless Otherwise Noted)
TPC 1.DRVH Fall and DRVL
Rise Times
TPC 4.DRVH and DRVL Fall Times
vs. Temperature
TPC 7.Supply Current vs.
Frequency
TPC 2.DRVL Fall and DRVH
Rise Times
TPC 5.DRVH and DRVL Rise Times
vs. Load Capacitance
TPC 8.Supply Current vs.
Temperature
TPC 3.DRVH and DRVL Rise Times
vs. Temperature
TPC 6.DRVH and DRVL Fall Times
vs. Load Capacitance
