ADP3367AR-REEL Fast Delivery |IC PHOENIX CO.,LIMITED

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ADP3367AR-REEL
+5 V Fixed, Adjustable Low-Dropout Linear Voltage Regulator
REV.0
+5 V Fixed, Adjustable
Low-Dropout Linear Voltage Regulator
FEATURES
Low Dropout:150 mV @ 200 mA
Low Dropout:300 mV @ 300 mA
Low Power CMOS: 17 mA Quiescent Current
Shutdown Mode: 0.2 mA Quiescent Current
300 mA Output Current Guaranteed
Pin Compatible with MAX667
Stable with 10 mF Load Capacitor
+2.5 V to +16.5 V Operating Range
Low Battery Detector
Fixed +5 V or Adjustable Output
High Accuracy:62%
Dropout Detector Output
Low Thermal Resistance Package*
ESD > 6000 V
APPLICATIONS
Handheld Instruments
Cellular Telephones
Battery Operated Devices
Portable Equipment
Solar Powered Instruments
High Efficiency Linear Power Supplies
FUNCTIONAL BLOCK DIAGRAM
TYPICAL OPERATING CIRCUIT
+5V
OUTPUT
+6V
INPUT
VIN–VOUT – V
LOAD CURRENT – mA
300
Load Current vs. Input-Output Differential Voltage
ADI’s proprietary Thermal Coastline leadframe used in ADP3367AR
packaging, has 30% lower thermal resistance than the standard
leadframes. This improvement in heat flow rate results in lower
die temperature hence improves reliability.
GENERAL DESCRIPTION
The ADP3367 is a low-dropout precision voltage regulator that
can supply up to 300 mA output current. It can be used to give
a fixed +5 V output with no additional external components or
can be adjusted from +1.3 V to +16 V using two external
resistors.Fixed or adjustable operation can be selected via the
SET input. The low quiescent current (17 μA) in conjunction
with the standby or shutdown mode (0.2 μA) makes this device
especially suitable for battery powered systems. The dropout
voltage when supplying 100 μA is only 15 mV allowing opera-
tion with minimal headroom thereby prolonging the useful bat-
tery life. At higher output current levels the dropout remains
low increasing to just 150 mV when supplying 200 mA. A wide
input voltage range from 2.5 V to 16.5 V is allowable. Addi-
tional features include a dropout detector and a low supply/bat-
tery monitoring comparator. The dropout detector can be used
to signal loss of regulation while the low battery detector can be
used to monitor the input supply voltage.
The ADP3367 is a much improved pin-compatible replacement
for the MAX667. Improvements include lower supply current,
tighter voltage accuracy and superior line and load regulation.
Improved ESD protection (>6000 V) is achieved by advanced
voltage clamping structures. The ADP3367 is specified over the
industrial temperature range –40°C to +85°C and is available in
narrow surface mount (SOIC) packages.
*Patent pending.
ADP3367–SPECIFICATIONS
Output Voltage, VOUT
Quiescent Current
Dropout Voltage
SET Input Threshold
Short Circuit Current, IOUT
LBI Hysteresis
LBI Input Leakage Current, ILBI
Low Battery Detector Output Voltage, VLBO
Specifications subject to change without notice.
(VIN = +9V, GND = 0V, VOUT = +5 V, TA = TMIN to TMAX unless otherwise noted)
ORDERING GUIDE
ABSOLUTE MAXIMUM RATINGS*
(TA= +25°C unless otherwise noted)
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +18 V
Output Short Circuit to GND Duration . . . . . . . . . . . . . 1 sec
LBO Output Sink Current . . . . . . . . . . . . . . . . . . . . . . . 50 mA
LBO Output Voltage . . . . . . . . . . . . . . . . . . . . . GND to VOUT
SHDN Input Voltage . . . . . . . . . . . . . . –0.3 V to (VIN + 0.3 V)
LBI, SET Input Voltage . . . . . . . . . . . –0.3 V to (VIN + 0.3 V)
Power Dissipation, R-8 . . . . . . . . . . . . . . . . . . . . . . . 960 mW
(Derate 10 mW/°C above +50°C)
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . . .98°C/W
Operating Temperature Range
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . > 6000 V
*This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operation sections of this specifica-
tion is not implied. Exposure to absolute maximum rating conditions for extended
periods of time may affect reliability.
PIN FUNCTION DESCRIPTION
VIN
GND
LBI
LBO
SHDN
SET
OUT
DIP & SOIC PIN CONFIGURATION
OUT
LBI
GND
LBO
SET
SHDN
TERMINOLOGY
Dropout Voltage:The input/output voltage differential at
which the regulator no longer maintains regulation against fur-
ther reductions in input voltage. It is measured when the output
decreases 100 mV from its nominal value. The nominal value is
the measured value with VIN = VOUT +2 V.
Line Regulation:The change in output voltage as a result of a
change in the input voltage. It is specified for a change of input
voltage from 6 V to 10 V.
Load Regulation:The change in output voltage for a change
in output current. It is specified for an output current change
from 10 mA to 200 mA.
Quiescent Current (IGND):The input bias current which
flows into the regulator not including load current. It is mea-
sured on the GND line and is specified in shutdown and also for
different values of load current.
Shutdown:The regulator is disabled and power consumption
is minimized.
Dropout Detector:An output that indicates that the regulator
is dropping out of regulation.
Maximum Power Dissipation:The maximum total device
dissipation for which the regulator will continue to operate
within specifications.
GENERAL INFORMATION
The ADP3367 contains a micropower bandgap reference volt-
age source, an error amplifier A1, two comparators (C1, C2)
and a series PNP output pass transistor.
CIRCUIT DESCRIPTION
The internal bandgap voltage reference is trimmed to 1.255V
and is used as a reference input to the error amplifier A1.The
feedback signal from the regulator output is supplied to the
other input by an on-chip voltage divider or by two external
resistors.When the SET input is at ground, the internal divider
provides the error amplifier’s feedback signal giving a +5V out-
put. When SET is at more than 50 mV above ground, compara-
tor C1 switches the error amplifier’s input directly to the SET
pin, and external resistors are used to set the output voltage.
The external resistors are selected so that the desired output
voltage gives 1.255 V at the SET input.
The output from the error amplifier supplies base current to the
PNP output pass transistor which provides output current. Up
to 300mA output current is available provided that the device
power dissipation is not exceeded.
Comparator C2 compares the voltage on the Low Battery Input
(LBI) pin to the internal +1.255V reference voltage. The out-
put from the comparator drives an open drain FET connected
to the Low Battery Output pin, LBO. The Low Battery Thresh-
old may be set using a suitable voltage divider connected to
LBI. When the voltage on LBI falls below 1.255V, the open
drain output, LBO, is pulled low.
A shutdown (SHDN) input that can be used to disable the
error amplifier and hence the voltage output is also available.
The supply current in shutdown is less than 0.75μA.
Figure 1.ADP3367 Functional Block Diagram
DROPOUT VOLTAGE – mV
Figure 2.
IOUT – mA
GROUND CURRENT – mA
Figure 3.Ground Current vs. Load Current
I-O DIFFERENCE – mV
DD OUTPUT CURRENT – µA
0.100.150.200.250.300.350.40
Figure 4.DD Output Current vs. I-O Differential
Δ1 – mA
0.00200
V – mV100150
0.52.0
Figure 5.Load Regulation (DVOUT vs. DIOUT)
Figure 6.Dynamic Response to Input Change
CH11.00V20.0mVM 2.00ms
100mA
10mA
OUTPUT
CURRENT
VOUT
20mV
Figure 7.Dynamic Response to Load Change
ADP3367–Typical Performance Characteristics
APPLICATIONS INFORMATION
Circuit Configurations
For a fixed +5 V output the SET input should be grounded, and
no external resistors are necessary. This basic configuration is
shown in Figure 8. The input voltage can range from +5.15 V
to +16.5 V, and output currents up to 300 mA are available
provided that the maximum package power dissipation is not
exceeded.
+5V
OUTPUT
Figure 8.Fixed +5 V Output Circuit
Output Voltage Setting
If the SET input is connected to a resistor divider network, the
output voltage is set according to the following equation:
VOUT=VSET×R1+R2
where VSET = 1.255 V.
VIN
VOUT
Figure 9.Adjustable Output Circuit
The resistor values may be selected by first choosing a value for
R1 and then selecting R2 according to the following equation: =R1×VOUT
VSET−1
The input leakage current on SET is 10nA maximum. This
allows large resistor values to be chosen for R1 and R2 with
little degradation in accuracy. For example, a 1 MΩ resistor
may be selected for R1, and then R2 may be calculated accord-
ingly. The tolerance on SET is guaranteed at less than ±25mV,
so in most applications fixed resistors will be suitable.
Shutdown Input (SHDN)
The SHDN input allows the regulator to be switched off with a
logic level signal. This will disable the output and reduce the
current drain to a low quiescent (0.75μA maximum) current.
This is very useful for low power applications. Driving the
SHDN input to greater than 1.5V places the part in shutdown.
If the shutdown function is not being used, then SHDN should
be connected to GND.
Low Supply or Low Battery Detection
The ADP3367 contains on-chip circuitry for low power supply
or battery detection. If the voltage on the LBI pin falls below
the internal 1.255 V reference, then the open drain output LBO
will go low. The low threshold voltage may be set to any voltage
above 1.255V by appropriate resistor divider selection. =R4×VBATTLBI
where R3 and R4 are the resistive divider resistors and VBATT is
the desired low voltage threshold.
Since the LBI input leakage current is less than 10 nA, large
values may be selected for R3 and R4 in order to minimize
loading. For example, a 6 V low threshold, may be set using
10 MΩ for R3 and 2.7 MΩ for R4.
The LBO output is an open-drain output that goes low sinking
current when LBI is less than 1.255V. A pull-up resistor ofkΩ or greater may be used to obtain a logic output level with
the pull-up resistor connected to VOUT.
Figure 10.Low Battery/Supply Detect Circuit
Dropout Detector
The ADP3367 features an extremely low dropout voltage mak-
ing it suitable for low voltage systems where headroom is
limited.A dropout detector is also provided. The dropout
detector output, DD, changes as the dropout voltage approaches
its limit. This is useful for warning that regulation can no longer be
maintained.The dropout detector output is an open collector out-
put from a PNP transistor. Under normal operating conditions
with the input voltage more than 300mV above the output, the
PNP transistor is off and no current flows out the DD pin. As the
voltage differential reduces to less than 300mV, the transistor
switches on and current is sourced. This condition indicates that
regulation can no longer be maintained. Please refer to Figure 4 in
the “Typical Performance Characteristics.” The current output
can be translated into a voltage output by connecting a resistor
from DD to GND.A resistor value of 100kΩ is suitable. A digital
status signal can be obtained using a comparator. The on-chip
comparator LBI may be used if it is not being used to monitor a
battery voltage. This is illustrated in Figure 11.
ADP3367
+5V
OUTPUT
VIN
100kΩ
Figure 11.Dropout Status Output
Output Capacitor
An output capacitor is required on the ADP3367 to maintain sta-
bility and also to improve the load transient response. Capacitor
values from 10μF upwards are recommended. Capacitors larger
than 10μF will further improve the transient response. Tantalum
or aluminum electrolytics are suitable for most applications. For
temperatures below about –25°C, solid tantalums should be used
as many aluminum electrolytes freeze at this temperature.
Quiescent Current Considerations
The ADP3367 uses a PNP output stage to achieve low dropout
voltages combined with high output current capability. Under
normal regulating conditions the quiescent current is extremely
low. However if the input voltage drops so that it is below the
desired output voltage, the quiescent current increases consider-
ably. This happens because regulation can no longer be main-
tained and large base current flows in the PNP output transistor
in an attempt to hold it fully on. For minimum quiescent cur-
rent, it is therefore important that the input voltage is main-
tained higher than the desired output level. If the device is being
powered using a battery that can discharge down below the rec-
ommended level, there are a couple of techniques that can be
applied to reduce the quiescent current, but at the expense of
dropout voltage. The first of these is illustrated in Figure 12. By
connecting DD to SHDN the regulator is partially disabled with
input voltages below the desired output voltage and therefore
the quiescent current is reduced considerably.
+5V
OUTPUT
VIN
0.1µF
Figure 12.IQ Reduction 1
Another technique for reducing the quiescent current near drop-
out is illustrated in Figure 13. The DD output is used to modify
the output voltage so that as VIN drops, the desired output volt-
age setpoint also drops. This technique only works when exter-
nal resistors are used to set the output voltage. With VINgreater
than VOUT, DD has no effect. As VINreduces and dropout is
reached, the DD output starts sourcing current into the SET
input through R3. This increases the SET voltage so that the
regulator feedback loop does not drive the internal PNP transis-
tor as hard as it otherwise would.As the input voltage continues
to decrease, more current is sourced, thereby reducing the PNP
drive even further. The advantage of this scheme is that it main-
tains a low quiescent current down to very low values of VIN
which point the batteries are well outside their useful operating
range. The output voltage tracks the input voltage minus the
dropout. The SHDN function is also unaffected and may be
used normally if desired.
Figure 13.IQ Reduction 2
POWER DISSIPATION
The ADP3367 can supply currents up to 300mA and can oper-
ate with input voltages as high as 16.5V, but not simultaneously.
It is important that the power dissipation and hence the internal
die temperature be maintained below the maximum limits. Power
Dissipation is the product of the voltage differential across the
regulator times the current being supplied to the load. The
maximum package power dissipation is given in the Absolute
Maximum Ratings. In order to avoid excessive die temperatures,
these ratings must be strictly observed.
PD = (VIN– VOUT) (IL)
The die temperature is dependent on both the ambient tempera-
ture and on the power being dissipated by the device. The inter-
nal die temperature must not exceed 125°C. Therefore, care
must be taken to ensure that, under normal operating condi-
tions, the die temperature is kept below the thermal limit.= TA + PD (θJA)

Partno	Mfg	Dc	Qty	Available	Descript
ADP3367AR-REEL \|ADP3367ARREEL	AD	N/a	682	avai	+5 V Fixed, Adjustable Low-Dropout Linear Voltage Regulator