ADP3335ARM-2.5 ,0.3-16V; 200mW; 500MHz, high accuracy ultralow 500mA anyCAP low dropout regulator. For PCMCIA card, cellular phones, camcorders and camerasGENERAL DESCRIPTION+ +C CIN OUTSD GNDThe ADP3335 is a member of the ADP330x family of precision 1F ..
ADP3335ARM-2.5-RL ,High Accuracy Ultralow Quiescent Current, 500mA, anyCAP® Low DropoutSpecifications subject to change without notice. No license is granted by implication www.analog.c ..
ADP3335ARM-2.85 ,0.3-16V; 200mW; 500MHz, high accuracy ultralow 500mA anyCAP low dropout regulator. For PCMCIA card, cellular phones, camcorders and camerasFEATURESHigh Accuracy Over Line and Load: 0.9% @ 25C,1.8% Over TemperatureQ1IN OUTUltralow Dropo ..
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ADP3335ARMZ-2.5RL7 ,High Accuracy Ultralow Quiescent Current, 500mA, anyCAP® Low DropoutFEATURES High accuracy over line and load: ±0.9% @ 25°C, Q1OUTIN±1.8% over temperature ADP3335THER ..
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ADP3335ARM-1.8-ADP3335ARM-2.5-ADP3335ARM-2.85-ADP3335ARM-3.3
0.3-16V; 200mW; 500MHz, high accuracy ultralow 500mA anyCAP low dropout regulator. For PCMCIA card, cellular phones, camcorders and cameras
REV.0
High Accuracy Ultralow IQ, 500 mA
anyCAP® Low Dropout Regulator
FUNCTIONAL BLOCK DIAGRAM
FEATURES
High Accuracy Over Line and Load: �0.9% @ 25�C,�1.8% Over Temperature
Ultralow Dropout Voltage: 200 mV (Typ) @ 500 mA
Requires Only CO = 1.0 �F for Stability
anyCAP = Stable with Any Type of Capacitor
(Including MLCC)
Current and Thermal Limiting
Low Noise
Low Shutdown Current: < 1.0 �A
2.6 V to 12 V Supply Range
–40�C to +85�C Ambient Temperature Range
Ultrasmall Thermally-Enhanced 8-Lead MSOP Package
APPLICATIONS
PCMCIA Card
Cellular Phones
Camcorders, Cameras
Networking Systems, DSL/Cable Modems
Cable Set-Top Box
MP3/CD Players
DSP SupplyanyCAP is a registered trademark of Analog Devices Inc.
Figure 1.Typical Application Circuit
GENERAL DESCRIPTIONThe ADP3335 is a member of the ADP330x family of precision
low dropout anyCAP voltage regulators. The ADP3335 operates
with an input voltage range of 2.6 V to 12 V and delivers a con-
tinuous load current up to 500 mA. The ADP3335 stands out
from conventional LDOs with the lowest thermal resistance of
any MSOP-8 package and an enhanced process that enables it
to offer performance advantages beyond its competition. Its
patented design requires only a 1.0 µF output capacitor for sta-
bility. This device is insensitive to output capacitor Equivalent
Series Resistance (ESR), and is stable with any good quality
capacitor, including ceramic (MLCC) types for space-restricted
applications. The ADP3335 achieves exceptional accuracy of
±0.9% at room temperature and ±1.8% over temperature, line,
and load. The dropout voltage of the ADP3335 is only 200 mV
(typical) at 500 mA. This device also includes a safety current
limit, thermal overload protection and a shutdown feature. In
shutdown mode, the ground current is reduced to less than
1 µA. The ADP3335 has ultralow quiescent current 80 µA
(typical) in light load situations.
ADP3335–SPECIFICATIONS1, 2, 3(VIN = 6.0 V, CIN = COUT = 1.0 �F, TA = –40�C to +85�C, unless otherwise noted)NOTESAll limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC) methods.Ambient temperature of 85°C corresponds to a junction temperature of 125°C under pulsed full load test conditions.Application stable with no load.VIN = 2.6 V to 12 V for models with VOUT(NOM) ≤ 2.2 V.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*Input Supply Voltage . . . . . . . . . . . . . . . . . . . –0.3 V to +16 V
Shutdown Input Voltage . . . . . . . . . . . . . . . . –0.3 V to +16 V
Power Dissipation . . . . . . . . . . . . . . . . . . . Internally Limited
Operating Ambient Temperature Range . . . . –40°C to +85°C
Operating Junction Temperature Range . . . –40°C to +150°C
θJA 2-layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153°C/W
θJA 4-layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110°C/W
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . 300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged.
PIN FUNCTION DESCRIPTIONS
PIN CONFIGURATION
ORDERING GUIDE*Contact the factory for other output voltage options.
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADP3335 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
ADP3335Figure 2.Line Regulation Output
Voltage vs. Supply Voltage
Figure 5.Ground Current vs. Load
Current
Figure 8.Dropout Voltage vs.
Output Current
–Typical Performance CharacteristicsFigure 3.Output Voltage vs. Load
Current
Figure 6.Output Voltage Variation %
vs. Junction Temperature
Figure 9.Power-Up/Power-Down
Figure 4.Ground Current vs. Supply
Voltage
Figure 7.Ground Current vs. Junction
Temperature
Figure 10.Power–Up Response
(TA = 25�C unless otherwise noted.)
Figure 11.Line Transient Response
Figure 14.Load Transient Response
Figure 17.Power Supply Ripple
Rejection
Figure 12.Line Transient Response
Figure 15.Short Circuit Current
CL – �F
RMS NOISE Figure 18.RMS Noise vs. CL
(10 Hz–100 kHz)
Figure 13.Load Transient Response
Figure 16.Turn On–Turn Off Response
Figure 19.Output Noise Density
ADP3335
THEORY OF OPERATIONThe new anyCAP LDO ADP3335 uses a single control loop for
regulation and reference functions. The output voltage is sensed
by a resistive voltage divider consisting of R1 and R2 which is
varied to provide the available output voltage option. Feedback
is taken from this network by way of a series diode (D1) and a
second resistor divider (R3 and R4) to the input of an amplifier.
Figure 20.Functional Block Diagram
A very high gain error amplifier is used to control this loop. The
amplifier is constructed in such a way that equilibrium pro-
duces a large, temperature-proportional input ,“offset voltage”
that is repeatable and very well controlled. The temperature-
proportional offset voltage is combined with the complementary
diode voltage to form a “virtual bandgap” voltage, implicit in
the network, although it never appears explicitly in the circuit.
Ultimately, this patented design makes it possible to control
the loop with only one amplifier. This technique also improves
the noise characteristics of the amplifier by providing more flex-
ibility on the trade-off of noise sources that leads to a low noise
design.
The R1, R2 divider is chosen in the same ratio as the bandgap
voltage to the output voltage. Although the R1, R2 resistor divider
is loaded by the diode D1 and a second divider consisting of R3
and R4, the values can be chosen to produce a temperature stable
output. This unique arrangement specifically corrects for the load-
ing of the divider thus avoiding the error resulting from base
current loading in conventional circuits.
The patented amplifier controls a new and unique noninverting
driver that drives the pass transistor, Q1. The use of this spe-
cial noninverting driver enables the frequency compensation
to include the load capacitor in a pole-splitting arrangement
to achieve reduced sensitivity to the value, type, and ESR of
the load capacitance.
Most LDOs place very strict requirements on the range of ESR
values for the output capacitor because they are difficult to stabilize
due to the uncertainty of load capacitance and resistance. More-
over, the ESR value, required to keep conventional LDOs stable,
changes depending on load and temperature. These ESR limita-
tions make designing with LDOs more difficult because of their
unclear specifications and extreme variations over temperature.
With the ADP3335 anyCAP LDO, this is no longer true. It can
be used with virtually any good quality capacitor, with no con-
straint on the minimum ESR. This innovative design allows the
circuit to be stable with just a small 1 µF capacitor on the out-
put. Additional advantages of the pole-splitting scheme include
superior line noise rejection and very high regulator gain, which
leads to excellent line and load regulation. An impressive ±1.8%
accuracy is guaranteed over line, load, and temperature.
Additional features of the circuit include current limit and ther-
mal shutdown and noise reduction.
APPLICATION INFORMATION
Capacitor SelectionOutput Capacitors: as with any micropower device, output
transient response is a function of the output capacitance. The
ADP3335 is stable with a wide range of capacitor values, types
and ESR (anyCAP). A capacitor as low as 1 µF is all that is
needed for stability; larger capacitors can be used if high output
current surges are anticipated. The ADP3335 is stable with
extremely low ESR capacitors (ESR≈0), such as multilayer
ceramic capacitors (MLCC) or OSCON. Note that the effective
capacitance of some capacitor types may fall below the mini-
mum at cold temperature. Ensure that the capacitor provides
more than 1 µF at minimum temperature.
Input Bypass CapacitorAn input bypass capacitor is not strictly required but is advisable
in any application involving long input wires or high source
impedance. Connecting a 1 µF capacitor from IN to ground
reduces the circuit's sensitivity to PC board layout. If a larger
value output capacitor is used, then a larger value input capaci-
tor is also recommended.
Noise ReductionA noise reduction capacitor (CNR) can be used to further reduce
the noise by 6 dB–10 dB (Figure 18) low leakage capacitors in
10 pF–500 pF range provide the best performance. Since the
noise reduction pin (NR) is internally connected to a high imped-
ance node, any connection to this node should be carefully done
to avoid noise pickup from external sources. The pad connected
to this pin should be as small as possible and long PC board
traces are not recommended.
When adding a noise reduction capacitor, maintain a mini-
mum load current of 1 mA when not in shutdown.
