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ADP3307ART-2.75-R7-ADP3307ART-2.7-RL7-ADP3307ART-3.3-RL7
High Accuracy anyCAP® 100 mA Low Dropout Linear Regulator
REV.A
High Accuracy anyCAP®
100 mA Low Dropout Linear Regulator
FUNCTIONAL BLOCK DIAGRAMFigure 1. Typical Application Circuit
FEATURES
High Accuracy Over Line and Load: �0.8% @ 25�C,�1.4% Over Temperature
Ultralow Dropout Voltage: 120 mV Typical @ 100 mA
Requires only CO = 0.47 �F for Stability
anyCAP = Stable with All Types of Output Capacitors
(Including MLCC)
Current and Thermal Limiting
Low Noise
Dropout Detector
Low Shutdown Current: 1 �A
3.0 V to 12 V Supply Range
–20�C to +85�C Ambient Temperature Range
Several Fixed Voltage Options
Ultrasmall SOT-23-6 (RT-6) Package
Excellent Line and Load Regulation
APPLICATIONS
Cellular Telephones
Notebook, Palmtop Computers
Battery Powered Systems
PCMCIA Regulator
Bar Code Scanners
Camcorders, Cameras
GENERAL DESCRIPTIONThe ADP3307 is a member of the ADP330x family of precision
low dropout anyCAP voltage regulators. The ADP3307 stands
out from the conventional LDOs with a novel architecture and
an enhanced process. Its patented design requires only a 0.47 µF
output capacitor for stability. This device is stable with any type
of capacitor regardless of its ESR (Equivalent Series Resistance)
value, including ceramic types (MLCC) for space restricted
applications. The ADP3307 achieves exceptional accuracy of0.8% at room temperature and ±1.4% overall accuracy over
temperature, line and load variations. The dropout voltage of
the ADP3307 is only 120 mV (typical) at 100 mA.
The ADP3307 operates with a wide input voltage range from
3.0 V to 12 V and delivers a load current in excess of 100 mA.
It features an error flag that signals when the device is about to
lose regulation or when the short circuit or thermal overload
protection is activated. Other features include shutdown and
optional noise reduction capabilities. The ADP330x anyCAP
LDO family offers a wide range of output voltages and output
current levels from 50 mA to 300 mA:
ADP3300 (50 mA, SOT-23-6)
ADP3307 (100 mA, SOT-23-6)
ADP3301 (100 mA, R-8)
ADP3302 (100 mA, Dual Output)
ADP3303 (200 mA)
anyCAP is a registered trademark of Analog Devices, Inc.
ADP3307–SPECIFICATIONS(@ TA = –20�C to +85�C, VIN = 7 V, CIN = 0.47 �F, COUT = 0.47 �F, unless
otherwise noted)1 The following specifications apply to all voltage options. NOTESAmbient temperature of 85°C corresponds to a junction temperature of 125°C under typical full load test conditions.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*Input Supply Voltage . . . . . . . . . . . . . . . . . . . –0.3 V to +16 V
Shutdown Input Voltage . . . . . . . . . . . . . . . . –0.3 V to +16 V
Error Flag Output Voltage . . . . . . . . . . . . . . . –0.3 V to +16 V
Noise Bypass Pin Voltage . . . . . . . . . . . . . . . . –0.3 V to +5 V
Power Dissipation . . . . . . . . . . . . . . . . . . . Internally Limited
Operating Ambient Temperature Range . . . –55°C to +125°C
Operating Junction Temperature Range . . . –55°C to +125°C
θJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230°C/W
θJC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92°C/W
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . 300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged.
ORDERING GUIDEContact the factory for the availability of other output voltage options.
Other Members of anyCAP Family1NOTESSee individual data sheets for detailed ordering information.R = Small Outline, SOT-23 = Surface Mount, TSSOP = Thin Shrink Small
Outline.
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3307 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
PIN FUNCTION DESCRIPTIONS
PIN CONFIGURATION
ADP3307TPC 1.Line Regulation Output
Voltage vs. Supply Voltage
TPC 4.Ground Current vs. Load
Current
TPC 7.Dropout Voltage vs.
Output Current
–Typical Performance CharacteristicsTPC 2.Output Voltage vs.
Load Current Up to 100 mA
TPC 5.Output Voltage Variation %
vs. Temperature
TPC 8.Power-Up/Power-Down
TPC 3.Quiescent Current vs. Supply
Voltage—3.2 V (Both Outputs)
TPC 6.Quiescent Current vs.
Temperature
TPC 9.Power-Up Overshoot
TPC 10.Line Transient Response
TPC 13.Load Transient
TPC 16.Turn Off
TPC 11.Line Transient Response
TPC 14.Short Circuit Current
TPC 17.Power Supply Ripple
Rejection
TPC 12.Load Transient
TPC 15.Turn On
TPC 18.Output Noise Density
ADP3307
THEORY OF OPERATIONThe ADP3307 anyCAP LDO uses a single control loop for
regulation and reference functions. The output voltage is sensed
by a resistive voltage divider consisting of R1 and R2 which is
varied to provide the available output voltage option. Feedback
is taken from this network by way of a series diode (D1) and a
second resistor divider (R3 and R4) to the input of an amplifier.
Figure 2.Functional Block Diagram
A very high gain error amplifier is used to control this loop.
The amplifier is constructed in such a way that at equilibrium it
produces a large, temperature proportional input “offset volt-
age” that is repeatable and very well controlled. The gained up
temperature proportional offset voltage is combined with the diode
voltage to form a “virtual bandgap” voltage, implicit in the net-
work, although it never appears explicitly in the circuit. Ultimately,
this patented design makes it possible to control the loop with
only one amplifier. This technique also improves the noise char-
acteristics of the amplifier by providing more flexibility on the
trade-off of noise sources that leads to a low noise design.
The R1, R2 divider is chosen in the same ratio as the bandgap
voltage to the output voltage. Although the R1, R2 resistor
divider is loaded by the diode D1, and a second divider consist-
ing of R3 and R4, the values are chosen to produce a tempera-
ture stable output.
The patented amplifier controls a new and unique noninvert-
ing driver that drives the pass transistor, Q1. The use of this
special noninverting driver enables the frequency compensa-
tion to include the load capacitor in a pole splitting arrange-
ment to achieve reduced sensitivity to the value, type and ESR
of the load capacitance.
Most LDOs place strict requirements on the range of ESR val-
ues for the output capacitor because they are difficult to stabilize
due to the uncertainty of load capacitance and resistance.
Moreover, the ESR value, required to keep conventional LDOs
stable, changes depending on load and temperature. These
ESR limitations make designing with conventional LDOs more
difficult because of their unclear specifications and the depen-
dence of ESR over temperature.
This is no longer true with the ADP3307 anyCAP LDO. It can
be used with virtually any good quality capacitor, with no con-
straint on the minimum ESR. The innovative design allows the
circuit to be stable with just a small 0.47 µF capacitor on the
output. Additional advantages of the design scheme include
superior line noise rejection and very high regulator gain that
lead to excellent line and load regulation. An impressive ±1.4%
accuracy is guaranteed over line, load and temperature.
Additional features of the circuit include current limit, thermal
shutdown and noise reduction. Compared to the standard solu-
tions that give warning after the output has lost regulation, the
ADP3307 provides improved system performance by enabling
the ERR pin to give warning before the device loses regulation.
As the chip’s temperature rises above 165°C, the circuit acti-
vates a soft thermal shutdown, indicated by a signal low on the
ERR pin, to reduce the current to a safe level.
To reduce the noise gain of the loop, the node of the main
divider network (a) is made available at the noise reduction
(NR) pin which can be bypassed with a small capacitor
(10 nF–100 nF).
APPLICATION INFORMATION
Capacitor Selection: anyCAPOutput Capacitors: as with any micropower device, output
transient response is a function of the output capacitance.
The ADP3307 is stable with a wide range of capacitor values,
types and ESR (anyCAP). A capacitor as low as 0.47 µF is all
that is needed for stability. However, larger capacitors can be
used if high output current surges are anticipated. There is an
upper limit on the size of the output capacitor. The ADP3307
is stable with extremely low ESR capacitors (ESR ≈ 0), such as
multilayer ceramic capacitors (MLCC) or OSCON.
Input Bypass Capacitor: an input bypass capacitor is not required;
however, for applications where the input source is high impedance
or far from the input pins, a bypass capacitor is recommended.
Connecting a 0.47 µF capacitor from the input to ground reduces
the circuit’s sensitivity to PC board layout. If a bigger output
capacitor is used, the input capacitor should be 1 µF minimum.
Noise ReductionA noise reduction capacitor (CNR) can be used to further reduce
the noise by 6 dB–10 dB (Figure 3). Low leakage capacitors in
10 nF–100 nF range provide the best performance. As the noise
reduction capacitor increases the high frequency loop-gain of
the regulator, the circuit requires a larger output capacitor if it is
used. The recommended value is 4.7 µF, as shown in Figure 3.
Since the noise reduction pin (NR) is internally connected to a
high impedance node, any connection to this node should be
carefully done to avoid noise pick up from external sources. The
pad connected to this pin should be as small as possible. Long
PC board traces are not recommended.
