ADP3170JRU ,VRM 8.5 Compatible Single Phase Core ControllerSPECIFICATIONS (VCC = 12 V, I = 150 A, T = 0C to 70C, unless otherwise noted.)REF AParameter Sym ..
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ADP3180JRU-REEL ,6-Bit Programmable 2-/ 3-/ 4-Phase Synchronous Buck ControllerGENERAL DESCRIPTIONThe ADP3180 is a highly effi cient multiphase synchronous buck 23SW1switching reg ..
ADP3180JRU-REEL7 ,6-Bit Programmable 2-/ 3-/ 4-Phase Synchronous Buck ControllerFEATURES FUNCTIONAL BLOCK DIAGRAMSelectable 2-, 3-, or 4-Phase Operation at up to VCC RAMPADJ RT ..
AK2358F , Base-band LSI for Europian Cordless Telephones(CTI, CTI)
AK2368 , BASE-BAND LSI FOR CORDLESS TELEPHONES
AK2500B , DS3/STS-1 Analog Line Receiver
AK2500B , DS3/STS-1 Analog Line Receiver
AK40A-048L-050F03SM , 15 Watts
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ADP3170JRU
VRM 8.5 Compatible Single Phase Core Controller
REV.0
VRM 8.5 Compatible
Single Phase Core Controller
FUNCTIONAL BLOCK DIAGRAM
VID25VID0VID1VID2VID3SDDRVH
VCC
GND
REF
LRFB
LRDRV
COMP
DRVL
PGND
PWRGD
CS–
CS+
FEATURES
Optimally Compensated Active Voltage Positioning
with Gain and Offset Adjustment (ADOPT™) for
Superior Load Transient Response
Complies with VRM 8.5 Specifications with Lowest
System Cost
5-Bit Digitally Programmable 1.05 V to 1.825 V Output
N-Channel Synchronous Buck Controller
Onboard 1.8 V Linear Regulator Controller
Total Accuracy �1% Over Temperature
High Efficiency Current-Mode Operation
Short Circuit Protection
Power Good Output
Overvoltage Protection Crowbar Protects
Microprocessors with No Additional External
Components
APPLICATIONS
Core and 1.8 V Standby Supplies for Next Generation
Intel Pentium® III Processors
GENERAL DESCRIPTIONThe ADP3170 is a highly efficient output synchronous buck
switching regulator controller optimized for converting a 5 V
main supply into the core supply voltage required by next
generation Intel Celeron processors. The ADP3170 uses an
internal 5-bit DAC to read a voltage identification (VID)
code directly from the processor, which is used to set the
output voltage between 1.05 V and 1.825 V. The ADP3170
uses a current mode, constant off-time architecture to drive two
N-channel MOSFETs at a programmable switching frequency
that can be optimized for regulator size and efficiency.
The ADP3170 also uses a unique supplemental regulation tech-
nique called Analog Devices Optimal Positioning Technology
(ADOPT) to enhance load transient performance. Active
voltage positioning results in a dc/dc converter that meets the
stringent output voltage specifications for high performance
processors, with the minimum number of output capacitors and
smallest footprint. Unlike voltage-mode and standard current-
mode architectures, active voltage positioning adjusts the output
voltage as a function of the load current so that it is always
optimally positioned for a system transient. The ADP3170 also
provides accurate and reliable short circuit protection and
adjustable current limiting. It also includes an integrated
overvoltage crowbar function to protect the microprocessor
from destruction in case the core supply exceeds the nominal
programmed voltage by more than 20%.
The ADP3170 contains a 1.8 V linear regulator controller that
is designed to drive an external N-channel MOSFET. This linear
regulator can be used to generate auxiliary voltages (such as 1.8 V
standby power) required in most motherboard designs, and has
been designed to provide a high bandwidth load-transient response.
The ADP3170 is specified over the commercial temperature range
of 0°C to 70°C and is available in a 20-lead TSSOP package.
ADOPT is a trademark of Analog Devices, Inc.
Pentium is a registered trademark of Intel Corporation
ADP3170–SPECIFICATIONS1
(VCC = 12 V, IREF = 150 �A, TA = 0�C to 70�C, unless otherwise noted.)
ADP3170SUPPLY
NOTESAll limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC).Dynamic supply current is higher due to the gate charge being delivered to the external MOSFETs.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +15 V
DRVH, DRVL, LRDRV . . . . . . . . . . –0.3 V to VCC + 0.3 V
All Other Inputs & Outputs . . . . . . . . . . . . . .–0.3 V to +10 V
Operating Ambient Temperature Range . . . . . . . 0°C to 70°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . 125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
�JA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .143°C/W
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . 300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*This is a stress rating only; operation beyond these limits can cause the device tobe permanently damaged. Unless otherwise specified, all voltages are referenced
to GND.
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADP3170 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
ORDERING GUIDE
ADP3170
PIN FUNCTION DESCRIPTIONS
PIN CONFIGURATION
RU-20
Figure 1.Closed-Loop Output Voltage Accuracy
Test Circuit
Figure 2.Linear Regulator Output Voltage Accuracy
Test Circuit
ADP3170–Typical Performance CharacteristicsTPC 1.Supply Current vs. Operating Frequency Using
MOSFETs of Figure 3
TPC 2.Gate Switching Waveforms Using MOSFETs
of Figure 3
TPC 3.Driver Transition Waveforms Using MOSFETs
of Figure 3
TPC 4.Power-On Start-Up Waveform
TPC 5.Output Accuracy Distribution
THEORY OF OPERATIONThe ADP3170 uses a current-mode, constant off-time control
technique to switch a pair of external N-channel MOSFETs in
a synchronous buck topology. Constant off-time operation
offers several performance advantages, including that no slope
compensation is required for stable operation. A unique feature
of the constant off-time control technique is that since the off-
time is fixed, the converter’s switching frequency is a function
of the ratio of input voltage to output voltage. The fixed off-
time is programmed by the value of an external capacitor
connected to the CT pin. The on-time varies in such a way
that a regulated output voltage is maintained as described
below in the cycle-by-cycle operation. Under fixed operating
conditions the on-time does not vary, and it varies only slightly
as a function of load. This means that switching frequency is
fairly constant in standard VRM applications.
Active Voltage PositioningThe output voltage is sensed at the CS– pin. A voltage error
amplifier, (gm), amplifies the difference between the output
voltage and a programmable reference voltage. The reference
voltage is programmed to between 1.05 V and 1.825 V by an
internal 5-bit DAC, which reads the code at the voltage identifi-
cation (VID) pins. (Refer to Table I for output voltage vs. VID
pin code information.) A unique supplemental regulation tech-
nique called Analog Devices Optimal Positioning Technology
(ADOPT) adjusts the output voltage as a function of the load
current so that it is always optimally positioned for a load
transient. Standard (passive) voltage positioning, sometimes
recommended for use with other architectures, has poor dynamic
performance that renders it ineffective under the stringent
repetitive transient conditions specified in Intel VRM documents.
Consequently, such techniques do not allow the minimum
possible number of output capacitors to be used. ADOPT, as
used in the ADP3170, provides a bandwidth for transient
response that is limited only by parasitic output inductance.
This yields optimal load transient response with the minimum
number of output capacitors.
Reference OutputA 3.0V reference is available on the ADP3170. This reference
is normally used to accurately set the voltage positioning using a
resistor divider to the COMP pin. In addition, the reference can
be used for other functions such as generating a regulated volt-
age with an external amplifier. The reference is bypassed with a
1 nF capacitor to ground. It is not intended to drive larger
capacitive loads, and it should not be used to provide more than
300μA of output current.
Cycle-by-Cycle OperationDuring normal operation (when the output voltage is regu-
lated), the voltage error amplifier and the current comparator
are the main control elements. During the on-time of the high
side MOSFET, the current comparator monitors the voltage
between the CS+ and CS– pins. When the voltage level between
the two pins reaches the threshold level, the DRVH output is
switched to ground, which turns off the high side MOSFET.
The timing capacitor CT is then charged at a rate determined
by the off-time controller. While the timing capacitor is charging,
the DRVL output goes high, turning on the low side MOSFET.
The output of the latch forces the low side drive output to go low
and the high side drive output to go high. As a result, the low side
switch is turned off and the high side switch is turned on. The
sequence is then repeated. As the load current increases, the output
voltage starts to decrease. This causes an increase in the output of
the voltage-error amplifier, which, in turn, leads to an increase in
the current comparator threshold, thus tracking the load current.
To prevent cross conduction of the external MOSFETs, feed-
back is incorporated to sense the state of the driver output pins.
Before the low side drive output can go high, the high side drive
output must be low. Likewise, the high side drive output is unable
to go high while the low side drive output is high.
Output CrowbarAn added feature of using an N-channel MOSFET as the syn-
chronous switch is the ability to crowbar the output with the
same MOSFET. If the output voltage is 20% greater than the
targeted value, the ADP3170 will turn on the lower MOSFET,
which will current-limit the source power supply or blow its fuse,
pull down the output voltage, and thus save the microprocessor
from destruction. The crowbar function releases at approxi-
mately 50% of the nominal output voltage. For example, if the
output is programmed to 1.5 V, but is pulled up to 1.85 V or
above, the crowbar will turn on the lower MOSFET. If in this
case the output is pulled down to less than 0.75 V, the crowbar
will release, allowing the output voltage to recover to 1.5 V if
the fault condition has been removed.
Onboard Linear Regulator ControllerThe ADP3170 includes a linear regulator controller to provide a
low cost solution for generating an additional supply rail. This
regulator is internally set to 1.8 V with ±2.8% accuracy. The
output voltage is sensed by the high input impedance LRFB
pin and compared to an internal fixed reference. The LRDRV
pin controls the gate of an external N-channel MOSFET
resulting in a negative feedback loop. The only additional
components required are a capacitor and resistor for stability.
Higher output voltages can be generated by placing a resistor
divider between the linear regulator output and its LRFB pin.
The maximum output load current is determined by the size
and thermal impedance of the external power MOSFET that
is placed in series with the supply and controlled by the ADP3170.
APPLICATION INFORMATION
Specifications for a Design ExampleThe design parameters for a typical VRM 8.5-compliant
Pentium III application (shown in Figure 3) are as follows:
Input voltage: (VIN) = 5 V
Auxiliary input: (VCC) = 12 V
VID setting voltage: (VOUT) = 1.8 V
Nominal output voltage at no load (VONL) = 1.845 V
Nominal output voltage at maximum load (VOFL) = 1.771 V
Static output voltage drop based on a 3.2 mW load line
(ROUT) from no load to full load (VΔ) = VONL – VOFL =
1.845 V – 1.771 V = 74 mV
Maximum output current (IO[MAX]) = 23 A
ADP3170
CT Selection for Operating FrequencyThe ADP3170 uses a constant off-time architecture with tOFF
determined by an external timing capacitor CT. Each time the
high-side N-channel MOSFET switch turns on, the voltage
across CT is reset to approximately 0 V. During the off-time,
CT is charged by a constant current of 150 μA. Once CT reaches
3.0 V, a new on-time cycle is initiated. The value of the off-time is
calculated using the continuous-mode operating frequency.
Assuming a nominal operating frequency (fNOM) of 200 kHz
at an output voltage of 1.8 V, the corresponding off-time is:(1)
The timing capacitor cab be calculated from the equation:
(2)
The converter operates at the nominal operating frequency only
at the above-specified VOUT and at light load. At higher values of
VOUT, or under heavy load, the operating frequency decreases
due to the parasitic voltage drops across the power devices. The
actual minimum frequency at VOUT = 1.8 V is calculated to be
183 kHz (see Equation3), where:
RDS(ON)HSF is the resistance of the high-side MOSFET
(estimated value: 6 mΩ)
RDS(ON)LSF is the resistance of the low-side MOSFET
(estimated value: 6 mΩ)
RSENSE is the resistance of the sense resistor
(estimated value: 2.5 mΩ)
RL is the resistance of the inductor
(estimated value: 3 mΩ)
Table I.Output Voltage vs. VID Code(3)
Inductance SelectionThe choice of inductance determines the ripple current in the
inductor. Less inductance leads to more ripple current, which
increases the output ripple voltage and the conduction losses in
the MOSFETs, but allows using smaller-size inductors and, for
a specified peak-to-peak transient deviation, output capacitors
with less total capacitance. Conversely, a higher inductance
means lower ripple current and reduced conduction losses, but
requires larger-size inductors and more output capacitance for
the same peak-to-peak transient deviation. The following equa-
tion shows the relationship between the inductance, oscillator
frequency, peak-to-peak ripple current in an inductor and input
and output voltages:
For 6 A peak-to-peak ripple current, which corresponds to
approximately 25% of the 23 A full-load dc current in an inductor,
Equation 4 yields an inductance of:
A 1 μH inductor can be used, which gives a calculated ripple
current of 5.9 A at no load. The inductor should not saturate at
the peak current of 26 A and should be able to handle the sum
of the power dissipation caused by the average current of 23 A
in the winding and the core loss.
