ADP3178JR ,4-Bit Programmable Synchronous Buck Controllerspecifications for high- and have been designed to provide a high bandwidth load-performance proces ..
ADP3180 ,6-Bit Programmable 2-, 3-, 4-Phase Synchronous Buck ControllerGENERAL DESCRIPTIONThe ADP3180 is a highly effi cient multiphase synchronous buck 23SW1switching reg ..
ADP3180JRU-REEL ,6-Bit Programmable 2-/ 3-/ 4-Phase Synchronous Buck ControllerGENERAL DESCRIPTIONThe ADP3180 is a highly effi cient multiphase synchronous buck 23SW1switching reg ..
ADP3180JRU-REEL7 ,6-Bit Programmable 2-/ 3-/ 4-Phase Synchronous Buck ControllerFEATURES FUNCTIONAL BLOCK DIAGRAMSelectable 2-, 3-, or 4-Phase Operation at up to VCC RAMPADJ RT ..
ADP3181 ,5-Bit or 6-Bit Programmable 2-,3-,4-Phase Synchronous Buck Controllerspecifications. It uses a multimode PWM architecture to drive the logic-level outputs at a programm ..
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ADP3158JR-ADP3158JR-REEL-ADP3178JR
4-Bit Programmable Synchronous Buck Controller
REV.A
4-Bit Programmable
Synchronous Buck Controllers
FUNCTIONAL BLOCK DIAGRAM
DRVH
LRDRV2
LRFB2
LRFB1
LRDRV1
COMP
DRVL
GND
CS–
CS+
VCCCT
VID3VID2VID1VID0
FEATURES
Optimally Compensated Active Voltage Positioning
with Gain and Offset Adjustment (ADOPT™) for
Superior Load Transient Response
Complies with VRM Specifications with Lowest
System Cost
4-Bit Digitally Programmable 1.3 V to 2.05 V Output
N-Channel Synchronous Buck Driver
Total Accuracy �0.8% Over Temperature
Two On-Board Linear Regulator Controllers Designed
to Meet System Power Sequencing Requirements
High Efficiency Current-Mode Operation
Short Circuit Protection for Switching Regulator
Overvoltage Protection Crowbar Protects Micro-
processors with No Additional External Components
APPLICATIONS
Core Supply Voltage Generation for:
Intel Pentium® III
Intel Celeron™
GENERAL DESCRIPTIONThe ADP3158 and ADP3178 are highly efficient synchronous
buck switching regulator controllers optimized for converting a
5 V main supply into the core supply voltage required by high-
performance processors. These devices use an internal 4-bit DAC
to read a voltage identification (VID) code directly from the
processor, which is used to set the output voltage between 1.3 V
and 2.05 V. They use a current mode, constant off-time archi-
tecture to drive two N-channel MOSFETs at a programmable
switching frequency that can be optimized for regulator size and
efficiency.
The ADP3158 and ADP3178 also use a unique supplemental
regulation technique called Analog Devices Optimal Positioning
Technology (ADOPT) to enhance load transient performance.
Active voltage positioning results in a dc/dc converter that
meets the stringent output voltage specifications for high-
performance processors, with the minimum number of output
capacitors and smallest footprint. Unlike voltage-mode and
standard current-mode architectures, active voltage positioning
adjusts the output voltage as a function of the load current so it
is always optimally positioned for a system transient. They also
provide accurate and reliable short circuit protection and
adjustable current limiting. The devices include an integrated
overvoltage crowbar function to protect the microprocessor
from destruction in case the core supply exceeds the nominal
programmed voltage by more than 20%.
The ADP3158 and ADP3178 contain two linear regulator
controllers that are designed to drive external N-channel
MOSFETs. The outputs are internally fixed at 2.5 V and 1.8 V
in the ADP3158, while the ADP3178 provides adjustable out-
puts that are set using an external resistor divider. These
linear regulators are used to generate the auxiliary voltages
(AGP, GTL, etc.) required in most motherboard designs,
and have been designed to provide a high bandwidth load-
transient response.
The ADP3158 and ADP3178 are specified over the commercial
temperature range of 0°C to 70°C and are available in a 16-lead
SOIC package.
ADOPT is a trademark of Analog Devices, Inc.
Pentium is a registered trademark of Intel Corporation.
Celeron is a trademark of Intel Corporation.
ADP3158/ADP3178–SPECIFICATIONS(VCC = 12 V, TA = 0�C to 70�C, unless otherwise noted.)NOTESAll limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC).Dynamic supply current is higher due to the gate charge being delivered to the external MOSFETs.
ABSOLUTE MAXIMUM RATINGS*VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +15 V
DRVH, DRVL, LRDRV1, LRDRV2 . . . . . –0.3 V to VCC + 0.3 V
All Other Inputs and Outputs . . . . . . . . . . . . –0.3 V to +10 V
Operating Ambient Temperature Range . . . . . . . 0°C to 70°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . 125°C
Storage Temperature Range . . . . . . . . . . . .–65°C to +150°C
θJA
Two-Layer Board . . . . . . . . . . . . . . . . . . . . . . . . . 125°C/W
Four-Layer Board . . . . . . . . . . . . . . . . . . . . . . . . . . 81°C/W
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . 300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged. Unless otherwise specified, all voltages are referenced
to GND.
PIN CONFIGURATION
PIN FUNCTION DESCRIPTIONS
ORDERING GUIDE
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADP3158/ADP3178 feature proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions
are recommended to avoid performance degradation or loss of functionality.
ADP3158/ADP3178
SUPPLY CURRENT
mA100200300400500600700800
OSCILLATOR FREQUENCY – kHzTPC 1.Supply Current vs. Operating Frequency Using
MOSFETs of Figure 3
TPC 2.Gate Switching Waveforms Using MOSFETs of
Figure 3
–Typical Performance Characteristics TPC 4.Power-On Start-Up Waveform
NUMBER OF PARTS
OUTPUT ACCURACY – % of Nominal0.5TPC 5.Output Accuracy Distribution
Figure 1.Closed Loop Output Voltage Accuracy
Test Circuit
Figure 2.Linear Regulator Output Voltage Accuracy
Test Circuit
THEORY OF OPERATIONThe ADP3158 and ADP3178 use a current-mode, constant off-
time control technique to switch a pair of external N-channel
MOSFETs in a synchronous buck topology. Constant off-time
operation offers several performance advantages, including that
no slope compensation is required for stable operation. A unique
feature of the constant off-time control technique is that since
the off-time is fixed, the converter’s switching frequency is a
function of the ratio of input voltage to output voltage. The
fixed off-time is programmed by the value of an external capaci-
tor connected to the CT pin. The on-time varies in such a way
that a regulated output voltage is maintained as described below
in the cycle-by-cycle operation. The on-time does not vary under
fixed input supply conditions, and it varies only slightly as a
function of load. This means that the switching frequency remains
fairly constant in a standard computer application.
Active Voltage PositioningThe output voltage is sensed at the CS– pin. A voltage error
amplifier, (gm), amplifies the difference between the output
voltage and a programmable reference voltage. The reference
voltage is programmed to between 1.3 V and 2.05 V by an inter-
nal 4-bit DAC that reads the code at the voltage identification
(VID) pins. (Refer to Table I for output voltage vs. VID pin code
information.) A unique supplemental regulation technique called
Analog Devices Optimal Positioning Technology (ADOPT)
adjusts the output voltage as a function of the load current so it
is always optimally positioned for a load transient. Standard
such techniques do not allow the minimum possible number of
output capacitors to be used. ADOPT, as used in the ADP3158
and ADP3178, provides a bandwidth for transient response that
is limited only by parasitic output inductance. This yields opti-
mal load transient response with the minimum number of output
capacitors.
Cycle-by-Cycle OperationDuring normal operation (when the output voltage is regulated),
the voltage error amplifier and the current comparator are the
main control elements. During the on-time of the high-side
MOSFET, the current comparator monitors the voltage between
the CS+ and CS– pins. When the voltage level between the two
pins reaches the threshold level, the DRVH output is switched
to ground, which turns off the high-side MOSFET. The timing
capacitor CT is then charged at a rate determined by the off-
time controller. While the timing capacitor is charging, the DRVL
output goes high, turning on the low-side MOSFET. When the
voltage level on the timing capacitor has charged to the upper
threshold voltage level, a comparator resets a latch. The output
of the latch forces the low-side drive output to go low and the
high-side drive output to go high. As a result, the low-side switch
is turned off and the high-side switch is turned on. The sequence
is then repeated. As the load current increases, the output voltage
starts to decrease. This causes an increase in the output of the
voltage-error amplifier, which, in turn, leads to an increase in
the current comparator threshold, thus tracking the load cur-
rent. To prevent cross conduction of the external MOSFETs,
feedback is incorporated to sense the state of the driver output
pins. Before the low-side drive output can go high, the high-side
drive output must be low. Likewise, the high-side drive output is
unable to go high while the low-side drive output is high.
Output CrowbarAn added feature of using an N-channel MOSFET as the syn-
chronous switch is the ability to crowbar the output with the
same MOSFET. If the output voltage is 20% greater than the
targeted value, the controller IC will turn on the lower MOSFET,
which will current-limit the source power supply or blow its fuse,
pull down the output voltage, and thus save the microprocessor
from destruction. The crowbar function releases at approxi-
mately 50% of the nominal output voltage. For example, if the
output is programmed to 1.5 V, but is pulled up to 1.85 V or
above, the crowbar will turn on the lower MOSFET. If in this
case the output is pulled down to less than 0.75 V, the crowbar
will release, allowing the output voltage to recover to 1.5 V if
the fault condition has been removed.
On-board Linear Regulator ControllersThe ADP3158 and ADP3178 include two linear regulator con-
trollers to provide a low cost solution for generating additional
supply rails. In the ADP3158, these regulators are internally set
to 2.5 V (LR1) and 1.8 V (LR2) with ±2.5% accuracy. The
ADP3178 is designed to allow the outputs to be set externally
using a resistor divider. The output voltage is sensed by the high
input impedance LRFB(x) pin and compared to an internal
fixed reference.
The LRDRV(x) pin controls the gate of an external N-channel
MOSFET resulting in a negative feedback loop. The only addi-
ADP3158/ADP3178Figure 3.15 A Pentium III Application Circuit
The linear regulator controllers have been designed so that they
remain active even when the switching controller is in UVLO mode
to ensure that the output voltages of the linear regulators will track
the 3.3 V supply as required by Intel design specifications. By
diode ORing the VCC input of the IC to the 5 VSB and 12 V
supplies as shown in Figure 3, the switching output will be disabled
in standby mode, but the linear regulators will begin conducting
once VCC rises above about 1 V. During start-up the linear out-
puts will track the 3.3 V supply up until they reach their respective
regulation points, regardless of the state of the 12 V supply. Once
the 12 V supply has exceeded the 5 VSB supply by more than a
diode drop, the controller IC will track the 12 V supply. Once the
12 V supply has risen above the UVLO value, the switching regula-
tor will begin its start-up sequence.
Table I. Output Voltage vs. VID Code
APPLICATION INFORMATION
Specifications for a Design ExampleThe design parameters for a typical 750 MHz Pentium III appli-
cation (shown in Figure 3) are as follows:
Input Voltage: (VIN) = 5 V
Auxiliary Input: (VCC) = 12 V
Output Voltage (VVID) = 1.7 V
Maximum Output Current (IO(MAX)) = 15 A
Minimum Output Current (IO(MIN)) = 1 A
Static tolerance of the supply voltage for the processor core
(ΔVO) = +40 mV (–80 mV) = 120 mV
Transient tolerance (for less than 2 μs) of the supply voltage
for the processor core when the load changes between the
minimum and maximum values with a di/dt of 20 A/μs
(ΔVO(TRANSIENT)) = +80 mV (–130 mV) = 210 mV
Input current di/dt when the load changes between the mini-
mum and maximum values < 0.1 A/μs.
The above requirements correspond to Intel’s published power
supply requirements based on VRM 8.4 guidelines.
CT Selection for Operating FrequencyThe ADP3158 and ADP3178 use a constant off-time architecture
with tOFF determined by an external timing capacitor CT. Each
time the high-side N-channel MOSFET switch turns on, the volt-
age across CT is reset to 0 V. During the off-time, CT is charged
by a constant current of 150 μA. Once CT reaches 3.0V, a new
on-time cycle is initiated. The value of the off-time is calculated
using the continuous-mode operating frequency. Assuming a
nominal operating frequency (fNOM) of 200 kHz at an output volt-
age of 1.7 V, the corresponding off-time is:(1)
The timing capacitor can be calculated from the equation:(2)
(3)
The converter only operates at the nominal operating frequency
at the above-specified VOUT and at light load. At higher values
of VOUT, or under heavy load, the operating frequency decreases
due to the parasitic voltage drops across the power devices. The
actual minimum frequency at VOUT = 1.7 V is calculated to be
195 kHz (see Equation 3), where:
RDS(ON)HSF is the resistance of the high-side MOSFET
(estimated value: 14 mΩ)
RDS(ON)LSF is the resistance of the low-side MOSFET
(estimated value: 6 mΩ)
RSENSE is the resistance of the sense resistor
(estimated value: 4 mΩ)
RL is the resistance of the inductor
(estimated value: 3 mΩ)
Inductance SelectionThe choice of inductance determines the ripple current in the
inductor. Less inductance leads to more ripple current, which
increases the output ripple voltage and the conduction losses in
the MOSFETs, but allows using smaller-size inductors and, for
a specified peak-to-peak transient deviation, output capacitors
with less total capacitance. Conversely, a higher inductance means
lower ripple current and reduced conduction losses, but requires
larger-size inductors and more output capacitance for the same
peak-to-peak transient deviation. The following equation shows
the relationship between the inductance, oscillator frequency,
peak-to-peak ripple current in an inductor and input and
output voltages.(4)
For 4 A peak-to-peak ripple current, which corresponds to
approximately 25% of the 15 A full-load dc current in an inductor,
Equation 4 yields an inductance of
A 1.5 μH inductor can be used, which gives a calculated ripple
current of 3.8 A at no load. The inductor should not saturate at
the peak current of 17 A and should be able to handle the sum
of the power dissipation caused by the average current of 15 A
in the winding and the core loss.
Designing an InductorOnce the inductance is known, the next step is either to design an
inductor or find a standard inductor that comes as close as
possible to meeting the overall design goals. The first decision
in designing the inductor is to choose the core material. There
are several possibilities for providing low core loss at high frequen-
cies. Two examples are the powder cores (e.g., Kool-Mμ® from
Magnetics, Inc.) and the gapped soft ferrite cores (e.g., 3F3 or 3F4
from Philips). Low frequency powdered iron cores should be
avoided due to their high core loss, especially when the inductor
value is relatively low and the ripple current is high.
Two main core types can be used in this application. Open
magnetic loop types, such as beads, beads on leads, and rods
and slugs, provide lower cost but do not have a focused mag-
netic field in the core. The radiated EMI from the distributed
magnetic field may create problems with noise interference in
the circuitry surrounding the inductor. Closed-loop types, such
as pot cores, PQ, U, and E cores, or toroids, cost more, but
have much better EMI/RFI performance. A good compromise
between price and performance are cores with a toroidal shape.
ADP3158/ADP3178There are many useful references for quickly designing a power
inductor. Table II gives some examples.
Table II.Magnetics Design ReferencesMagnetic Designer Software
Intusoft (http://www.intusoft.com)
Designing Magnetic Components for High-Frequency DC-DC
Converters
McLyman, Kg Magnetics
ISBN 1-883107-00-08
Selecting a Standard InductorThe companies listed in Table III can provide design consul-
tation and deliver power inductors optimized for high power
applications upon request.
Table III.Power Inductor ManufacturersCoilcraft
(847) 639-6400
http://www.coilcraft.com
Coiltronics
(561) 752-5000
http://www.coiltronics.com
Sumida Electric Company
(408) 982-9660
http://www.sumida.com
COUT Selection—Determining the ESRThe required equivalent series resistance (ESR) and capacitance
drive the selection of the type and quantity of the output capaci-
tors. The ESR must be small enough to contain the voltage
deviation caused by a maximum allowable CPU transient cur-
rent within the specified voltage limits, giving consideration also
to the output ripple and the regulation tolerance. The capaci-
tance must be large enough that the voltage across the capacitor,
which is the sum of the resistive and capacitive voltage deviations,
does not deviate beyond the initial resistive deviation while the
inductor current ramps up or down to the value corresponding
to the new load current. The maximum allowed ESR also repre-
sents the maximum allowed output resistance, ROUT.
The cumulative errors in the output voltage regulation cuts into
the available regulation window, VWIN. When considering dynamic
load regulation this relates directly to the ESR. When consider-
ing dc load regulation, this relates directly to the programmed
output resistance of the power converter.
Some error sources, such as initial voltage accuracy and ripple
voltage, can be directly deducted from the available regulation
window, while other error sources scale proportionally to the
amount of voltage positioning used, which, for an optimal design,
should utilize the maximum that the regulation window will allow.
The error determination is a closed-loop calculation, but it can
be closely approximated. To maintain a conservative design while
avoiding an impractical design, various error sources should
be considered and summed statistically.
The output ripple voltage can be factored into the calculation by
summing the output ripple current with the maximum output
current to determine an effective maximum dynamic current
change. The remaining errors are summed separately according
to the formula:
(5)
where kVID = 0.5% is the initial programmed voltage tolerance
from the graph of TPC 6, kRCS = 2% is the tolerance of the
current sense resistor, kCSF = 10% is the summed tolerance of
the current sense filter components, kRT = 2% is the tolerance of
the two termination resistors added at the COMP pin, and kEA
= 8% accounts for the IC current loop gain tolerance including
the gm tolerance.
The remaining window is then divided by the maximum output
current plus the ripple to determine the maximum allowed ESR
and output resistance:(6)
The output filter capacitor bank must have an ESR of less
than 5 mΩ. One can, for example, use five ZA series capacitors
from Rubycon which would give an ESR of 4.8 mΩ. Without
ADOPT voltage positioning, the ESR would need to be less than
3 mΩ, yielding a 50% increase to eight Rubycon output capacitors.
COUT—Checking the CapacitanceAs long as the capacitance of the output capacitor is above a
critical value and the regulating loop is compensated with ADOPT,
the actual value has no influence on the peak-to-peak deviation
of the output voltage to a full step change in the load current.
The critical capacitance can be calculated as follows:(7)
The critical capacitance for the five ZA series Rubycon capaci-
tors is 2.6 mF while the equivalent capacitance is 5 mF. The
capacitance is safely above the critical value.
