ADP3155JRU Fast Delivery |IC PHOENIX CO.,LIMITED

ADP3155JRU ,5-Bit Programmable Triple Power Supply Controller for Pentium III ProcessorsSPECIFICATIONSA CC INParameter Symbol Conditions Min Typ Max UnitsOUTPUT ACCURACY1.3 V Output Volta ..
ADP3155JRU ,5-Bit Programmable Triple Power Supply Controller for Pentium III ProcessorsSpecifications subject to change without notice.–2– REV. AADP3155PIN FUNCTION DESCRIPTIONSPin No. M ..
ADP3155JRU-REEL ,VRM 8.2/3/4 Buck Controller With Two Linear ControllersSPECIFICATIONSA CC INParameter Symbol Conditions Min Typ Max UnitsOUTPUT ACCURACY1.3 V Output Volta ..
ADP3155JRU-REEL ,VRM 8.2/3/4 Buck Controller With Two Linear Controllersspecifications for Pentium II and R1SDQ1DRIVE1Pentium III processors, with the minimum number of ou ..
ADP3155JRU-REEL ,VRM 8.2/3/4 Buck Controller With Two Linear ControllersSpecifications subject to change without notice.–2– REV. AADP3155PIN FUNCTION DESCRIPTIONSPin No. M ..
ADP3156JR-1.8 ,Fixed Output Buck ControllerSpecifications subject to change without notice.–2– REV. 0ADP3156PIN FUNCTION DESCRIPTIONSPin Mnemo ..
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ADP3155JRU
5-Bit Programmable Triple Power Supply Controller for Pentium III Processors
REV. A
5-Bit Programmable Triple Power Supply
Controller for Pentium® III Processors
FEATURES
Active Voltage Positioning with Gain and Offset
Adjustment
Optimal Compensation for Superior Load Transient
Response
VRM 8.2, VRM 8.3 and VRM 8.4-Compliant
5-Bit Digitally Programmable 1.3 V to 3.5 V Output
Dual N-Channel Synchronous Driver
Two Onboard Linear Regulator Controllers
Total Output Accuracy 61% Over Temperature
High Efficiency, Current-Mode Operation
Short Circuit Protection
Overvoltage Protection Crowbar Protects Micro-
processors, with No Additional External Components
Power Good Output
TSSOP-20 Package
APPLICATIONS
Desktop PC Power Supplies for:
Pentium II and Pentium III Processor Families
AMD-K6 Processors
VRM Modules
Pentium is a registered trademark of Intel Corporation.
All other trademarks are the property of their respective holders.
GENERAL DESCRIPTION
The ADP3155 is a highly efficient synchronous buck switching
regulator controller optimized for converting the 5 V main sup-
ply into the core supply voltage required by the Pentium III and
other high performance processors. The ADP3155 uses an
internal 5-bit DAC to read a voltage identification (VID) code
directly from the processor, which is used to set the output
voltage between 1.3 V and 3.5 V. The ADP3155 uses a current-
mode, constant off-time architecture to drive two external N-
channel MOSFETs at a programmable switching frequency that
can be optimized for size and efficiency. It also uses a unique
supplemental regulation technique called active voltage position-
ing to enhance load transient performance.
Active voltage positioning results in a dc/dc converter that meets
the stringent output voltage specifications for Pentium II and
Pentium III processors, with the minimum number of output
capacitors and the smallest footprint. Unlike voltage-mode and
standard current-mode architectures, active voltage positioning
adjusts the output voltage as a function of the load current so
that it is always optimally positioned for a system transient.
The ADP3155 provides accurate and reliable short circuit pro-
tection and adjustable current limiting. It also includes an inte-
grated overvoltage crowbar function to protect the microprocessor
from destruction in case the core supply exceeds the nominal
programmed voltage by more than 15%.
The ADP3155 contains two linear regulator controllers that are
designed to drive external N-channel MOSFETs. These linear
regulators are used to generate the auxiliary voltages (AGP,
GTL, etc.) required in most motherboard designs, and have
been designed to provide a high bandwidth load-transient re-
sponse. A pair of external feedback resistors sets each linear
regulator output voltage.
VOLDO1
QLDO1
VCC +12V
VIN +5V
1.3V TO
3.5V
5-BIT CODE
VOLDO2
1mF
VINLDO2
FUNCTIONAL BLOCK DIAGRAM
PWRGDSENSE+
DRIVE1 DRIVE2 PGND
SENSE–
VLDO1
FB1
VLDO2
FB2
VCCCT
CMP
VID0VID2VID3VID4
AGND
VID1
ADP3155–SPECIFICATIONS(08C £ TA £ +708C, VCC = 12 V, VIN = 5 V, unless otherwise noted)1
NOTESAll limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.Dynamic supply current is higher due to the gate charge being delivered to the external MOSFETs.The trip point is for the output voltage coming into regulation.
PIN FUNCTION DESCRIPTIONS
PIN CONFIGURATION
SENSE+
SENSE–
VLDO1
VID2
VID3
VID4
FB1
AGND
CMP
VLDO2
PGND
DRIVE1
DRIVE2
FB2
PWRGD
VCC
VID1VID0
ABSOLUTE MAXIMUM RATINGS*
Input Supply Voltage (VCC) . . . . . . . . . . . . . . –0.3 V to +16 V
Shutdown Input Voltage . . . . . . . . . . . . . . . . –0.3 V to +16 V
Operating Ambient Temperature Range . . . . . 0°C to +70°C
Junction Temperature Range . . . . . . . . . . . . . 0°C to +150°CJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110°C/W
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . +300°C
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged.
ORDERING GUIDE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3155 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ADP3155VO
0–19A
RTNVIN +5V
+5V RTN
+12V RTN
RTN
VIN +12V
VLDO1
+1.5V
VIN +1.8V
VINLDO2
+3.3V
VLDO2
+2.5V
0–2A
RTN
Figure 2.Typical VRM8.2/8.3/8.4 Compliant Core DC/DC Converter Circuit
VCCDRIVE1DRIVE2PGND
AGNDPWRGDSENSE+
SENSE–
CMP
VID0VID1VID2VID3VID411VLDO1
FB1VLDO2
FB2
Figure 3.Functional Block Diagram
OUTPUT CURRENT – Amps
EFFICIENCY – %
1.42.8144.25.679.811.212.68.4
Figure 4.Efficiency vs. Output
Current
500ns/DIV
DRIVE 1 AND 2 = 5V/DIV
Figure 7.Gate Switching Waveforms
10ms/DIV
Figure 10.Transient Response,
1 A–19 A of Figure 2 Circuit
TIMING CAPACITOR – pF100800200300400500600700
FREQUENCY – kHz
300
Figure 5.Frequency vs. Timing
Capacitor
100ns/DIV
Figure 8.Driver Transition
Waveforms
10ms/DIV
Figure 11.Power-On Start-Up
Waveform
OPERATING FREQUENCY – kHz3975883134
SUPPLY CURRENT – mA
Figure 6.Supply Current vs.
Operating Frequency
10ms/DIV
Figure 9.Transient Response,
19 A–1 A of Figure 2 Circuit
OUTPUT ACCURACY – %
NUMBER OF PARTS
0.5
Figure 12.Output Accuracy
Distribution, VOUT = 2.0 V
ADP3155
12V
0.1mF
VOUT
1.2V5-BIT CODE
Figure 13.Closed-Loop Test Circuit for Accuracy
THEORY OF OPERATION
The ADP3155 uses a current-mode, constant-off-time control
technique to switch a pair of external N-channel MOSFETs in
a synchronous buck topology. Constant off-time operation
offers several performance advantages, including that no slope
compensation is required for stable operation. A unique feature
of the constant-off-time control technique is that since the off-
time is fixed, the converter’s switching frequency is a function
of the ratio of input voltage to output voltage. The fixed off-
time is programmed by the value of an external capacitor con-
nected to the CT pin. The on-time varies in such a way that a
regulated output voltage is maintained as described below in the
cycle-by-cycle operation. Under fixed operating conditions the
on-time does not vary, and it varies only slightly as a function of
load. This means that switching frequency is fairly constant in
standard VRM applications. In order to maintain a ripple cur-
rent in the inductor that is independent of the output voltage
(which also helps control losses and simplify the inductor de-
sign), the off-time is made proportional to the value of the out-
put voltage. Normally, the output voltage is constant and,
therefore, the off-time is constant as well.
Active Voltage Positioning
The output voltage is sensed at the SENSE– pin. A voltage-
error amplifier, (gm), amplifies the difference between the output
voltage and a programmable reference voltage. The reference
voltage is programmed to between 1.3 V and 3.5 V by an inter-
nal 5-bit DAC, which reads the code at the voltage identifica-
tion (VID) pins. (Refer to Table I for output voltage vs. VID pin
code information.) A unique supplemental regulation technique
called active voltage positioning with optimal compensation
adjusts the output voltage as a function of the load current so
that it is always optimally positioned for a load transient. Stan-
dard (passive) voltage positioning, sometimes recommended for
use with other architectures, has poor dynamic performance
which renders it ineffective under the stringent repetitive tran-
sient conditions specified in Intel VRM documents. Conse-
quently, such techniques do not allow the minimum possible
number of output capacitors to be used. Optimally compen-
sated active voltage positioning as used in the ADP3155 pro-
vides a bandwidth for transient response that is limited only by
Table I.Output Voltage vs. VID Code
Cycle-by-Cycle Operation
During normal operation (when the output voltage is regulated),
the voltage-error amplifier and the current comparator (CMPI)
are the main control elements. (See the block diagram of Figure
3.) During the on-time of the high side MOSFET, CMPI moni-
tors the voltage between the SENSE+ and SENSE– pins. When
the voltage level between the two pins reaches the threshold level
VT1, the high side drive output is switched to ground, which
turns off the high side MOSFET. The timing capacitor CT is
then discharged at a rate determined by the off-time controller.
While the timing capacitor is discharging, the low side drive
output goes high, turning on the low side MOSFET. When the
voltage level on the timing capacitor has discharged to the thresh-
old voltage level VT2, comparator CMPT resets the SR flip-flop.
The output of the flip-flop forces the low side drive output to go
low and the high side drive output to go high. As a result, the low
side switch is turned off and the high side switch is turned on.
The sequence is then repeated. As the load current increases, the
output voltage starts to decrease. This causes an increase in the
output of the voltage-error amplifier, which, in turn, leads to an
increase in the current comparator threshold VT1, thus tracking
the load current. To prevent cross conduction of the external
Power Good
The ADP3155 has an internal monitor that senses the output
voltage and drives the PWRGD pin of the device. This pin is an
open drain output whose high level (when connected to a pull-
up resistor) indicates that the output voltage has been within a5% regulation band of the targeted value for more than 500 ms.
The PWRGD pin will go low if the output is outside the regula-
tion band for more than 500 ms.
Output Crowbar
An added feature of using an N-channel MOSFET as the syn-
chronous switch is the ability to crowbar the output with the
same MOSFET. If the output voltage is 15% greater than the
targeted value, the ADP3155 will turn on the lower MOSFET,
which will current-limit the source power supply or blow its
fuse, pull down the output voltage, and thus save the micropro-
cessor from destruction. The crowbar function releases at ap-
proximately 50% of the nominal output voltage. For example, if
the output is programmed to 2.0 V, but is pulled up to 2.3 V or
above, the crowbar will turn on the lower MOSFET. If in this
case the output is pulled down to less than 1.0 V, the crowbar
will release, allowing the output voltage to recover to 2.0 V if
the fault condition has been removed.
Shutdown
The ADP3155 has a shutdown (SD) pin that is pulled down by
an internal resistor. In this condition the device functions nor-
mally. This pin should be pulled high to disable the output drives.
APPLICATION INFORMATION
A number of power conversion requirements must be consid-
ered when designing an ACPI compliant system. In normal
operating mode, 12 V, 5 V and 3.3 V are available from the
main supply. These voltages need to be converted into the
appropriate supply voltages for the Northbridge core, the
Southbridge core and RAMBUS memory, as well as supplies for
GTL and I/O drivers, CMOS memory and clock and graphics
(AGP) circuits.
During the standby operating state, the 12 V, 5 V and 3.3 V
power supply outputs are disabled, and only a low power 5 V
rail (5VSB) is available. The circuits that must remain active in
standby must be able to run from 5VSB. To accomplish this,
power routing is required to allow switching between normal
and standby supplies. Lack of a 12 V rail in standby makes control
of linear outputs difficult, and with up to 8 A demand from the
1.5 V and 1.8 V rails, an all-linear solution is inefficient.
Figure 14 shows a typical ACPI-compliant Pentium III/chipset
power management system using the ADP3155 and ADP3156.
The ADP3155 provides VID switched output and two linear
regulators for standby operation. A charge-pump-doubled 5VSB is
ORed into the supply rail to supply the linear regulators during
standby operation. The VID output collapses when the main
5 V rail collapses, but the N-channel MOSFET linear regu-
lators can continue to supply current from the ~9 V supply.
The ADP3156 provides 1.8 V via its main switching regulator,
and allows efficient linear regulation of 1.5 V rail by using the
1.8 V output as its source.
Specifications for a Design Example
The design parameters for a typical 300 MHz Pentium II appli-
cation (Figure 2) are as follows:
Input Voltage: VIN = 5 V
Auxiliary Input: VCC = 12 V
Output Voltage: VO = 2.8 V
Maximum Output Current:
IOMAX = 14.2 A dc
Minimum Output Current:
IOMIN = 0.8 A dc
Static tolerance of the supply voltage for the processor core:VOST+ = 100 mVVOST– = –60 mV
POWER MANAGEMENT
STATE COMMAND
ATX_POWER GOOD
5V_PM
CPU
VCORE @ VID
3.3V_PM
FOR POWER
MANAGEMENT
2.5V_PM
FOR CMOS,
TRIPLE
OUTPUT
SUPPLYVID
12V
DUAL
OUTPUT
SUPPLY
3.3V
1.8V FOR
SB CORE,
MEM, ETC
1.5V VTT
FOR GTL
1.5V OR 3.3V
VDDQ FOR AGP
TYPEDET# FOR
12V
3.3V
5V_PM
ATX_POWERGOOD
ATX_SHUTDOWN

Partno	Mfg	Dc	Qty	Available	Descript
ADP3155JRU	ADI	N/a	139	avai	5-Bit Programmable Triple Power Supply Controller for Pentium III Processors
ADP3155JRU	AD	N/a	1223	avai	5-Bit Programmable Triple Power Supply Controller for Pentium III Processors