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ADP3152-ADP3152AR
5-Bit Programmable Synchronous Switching Regulator Controller for Pentium II Processor
REV.0
5-Bit Programmable Synchronous
Switching Regulator Controller
for Pentium® II Processor
FEATURES
5-Bit Digitally Programmable 1.8 V to 3.5 V Output
Voltage
Dual N-Channel Synchronous Driver
Total Output Accuracy 61% (08C to 708C)
High Efficiency
Current-Mode Operation
Short Circuit Protection
Power Good Output
Integrated Overvoltage Protection Crowbar
16-Lead SOIC Package
VRM 8.2 Compatible
APPLICATIONS
Desktop PC Power Supply for:
Pentium II Processor
Pentium Pro Processor
Pentium Processor
AMD–K6 Processor
VRM Modules
GENERAL DESCRIPTIONThe ADP3152 is a highly efficient synchronous switching regu-
lator controller optimized for Pentium II Processor applications
where 5 V is stepped down to a digitally controlled output volt-
age between 1.8 V and 3.5 V. Using a 5-bit DAC to read a
voltage identification (VID) code directly from the processor,
the ADP3152 uses a current mode constant off-time architec-
ture to generate its precise output voltage.
The ADP3152 drives two N-channel MOSFETS in a synchro-
nous rectified buck converter, at a maximum switching fre-
quency of 250 kHz. Using the recommended loop compensation
and guidelines, the ADP3152 provides a dc/dc converter that
meets Intel’s stringent transient specifications with a minimum
number of output capacitors and smallest footprint. Additionally,
the current mode architecture also provides guaranteed short
circuit protection and adjustable current limiting.
VCC
+12V
150pF
5-BIT CODE
VIN
+5V
1.8V–3.5V
14AFigure 1.Typical Application
Pentium is a registered trademark of Intel Corporation.
All other trademarks are the property of their respective holders.
ADP3152–SPECIFICATIONS(08C ≤ TA ≤ +708C, VCC = 12 V, VIN = 5 V, unless otherwise noted)OUTPUT VOLTAGE LINE
CURRENT SENSE THRESHOLD
VID PINS THRESHOLD
CT PIN DISCHARGE CURRENT
DRIVER OUTPUT TRANSITION
ERROR AMPLIFIER
ERROR AMPLIFIER
ERROR AMPLIFIER MINIMUM
ERROR AMPLIFIER MAXIMUM
SHUTDOWN (SD) PIN
NOTESDynamic supply current is higher due to the gate charge being delivered to the external MOSFETS.
All limits at temperature extremes are guaranteed via correlation using standard quality control methods.
Specifications are subject to change without notice.
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADP3152 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
PIN FUNCTION DESCRIPTIONS
PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS*Input Supply Voltage (Pin 12) . . . . . . . . . . . .–0.3 V to +16 V
VID0–VID4, SD, PWRGD, CMP, CT . . . . . . .–0.3 V to VCC
DRIVE1, DRIVE2, SENSE+, SENSE– . . . . . .–0.3 V to VCC
Operating Temperature Range . . . . . . . . . . . . .0°C to +70°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . .150°C
θJA␣ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .110°C/W
Storage Temperature Range . . . . . . . . . . . .–65°C to +150°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . .+300°C
*This is a stress rating only; operation beyond these limits can cause the device to
be permanently damaged.
ORDERING GUIDE
VID1
VID2
VID3
VID4
AGND
SENSE–
SENSE+
VID0
PGND
DRIVE1
DRIVE2
VCC
PWRGD
CMP
ADP3152Figure 2.Typical Application for Pentium II
VCCDRIVE1DRIVE2PGND
AGNDPWRGDSENSE+
SENSE–
CMPVID0VID1VID2VID3VID4Figure 3.Functional Block Diagram
Figure 4.Efficiency vs. Output Current
500ns/DIV
DRIVE 1 AND 2 = 5V/DIVFigure 7.Gate Switching Waveforms
Figure 10.Transient Response,
1A–14 A of Figure 2 Circuit
TIMING CAPACITOR – pF100800200300400500600700
FREQUENCY – kHz
300Figure 5.Frequency vs. Timing
Capacitor
100ns/DIVFigure 8.Driver Transition Waveforms
10msFigure 11.Power-On Start-Up
Waveforms
Figure 6.Gate Charge Supply Cur-
rent vs. Operating Frequency
Figure 9.Transient Response, 14 A–1A
of Figure 2 Circuit
Figure 12.Output Accuracy
Distribution, VOUT = 2.8 V
ADP3152
12V
5-BIT
CODE
0.1mF
0.1mFFigure 13.Closed-Loop Test Circuit for Accuracy
APPLICATION INFORMATIONThe ADP3152 uses a current-mode, constant-off-time control
technique to switch a pair of external N-channel MOSFETs in
a synchronous rectified buck converter application. Due to the
constant-off-time operation, no slope compensation is needed.
A unique feature of the constant-off-time control technique is
that the converter’s frequency becomes a function of the ratio of
input voltage to output voltage. The off time is determined by
the value of the external capacitor connected to the CT pin.
The on time varies in such a way that a regulated output volt-
age is maintained.
The output voltage is sensed by an internal voltage divider that
is connected to the Sense– pin. A voltage-error amplifier gm
compares the values of the divided output voltage with a refer-
ence voltage. The reference voltage is set by an onboard 5-bit
DAC, which reads the code present at the voltage identification
(VID) pins and converts it to a precise value between 600 mV
and 1.167 V. Refer to Table I for the output voltage vs. VID pin
code information.
During continuous-inductor-current mode of operation, the
voltage-error amplifier gm and the current comparator CMPI
are the main control elements. During the on time of the high
side MOSFET, the current comparator CMPI monitors the
voltage between the Sense+ and Sense– pins. When the voltage
level between the two pins reaches the threshold level VT1, the
high side drive output is switched to zero, which turns off the
high side MOSFET. The timing capacitor CT is now discharged
at a rate determined by the off time controller. In order to
maintain a ripple current in the inductor, which is independent
of the output voltage, the discharge current is made propor-
tional to the value of the output voltage (measured at the
Sense– pin). While the timing capacitor is discharging, the low
side drive output goes high, turning on the low side MOSFET.
When the voltage level on the timing capacitor has discharged
to the threshold voltage level VT2, comparator CMPT resets
the SR flip-flop. The output of the flip-flop forces the low side
drive output to go low and the high side drive output to go high.
As a result, the low side switch is turned off and the high side
causes an increase in the output of the voltage-error amplifier,
which, in turn, leads to an increase in the current comparator
threshold VT1, thus tracking the load current.
Table I.Output Voltage vs. VID CodeTo prevent cross conduction of the external MOSFETs, feed-
back is incorporated to sense the state of the driver output pins.
Before the low side drive output can go high, the high side drive
output must be low. Likewise, the high side drive output is
unable to go high while the low side drive output is high.
Power GoodThe ADP3152 has an internal monitor which monitors the
output voltage and drives the PWRGD pin of the device. This
pin is an open drain output whose high level (when connected
to a pull-up resistor) indicates that the output voltage has been
within a ±5% regulation band of the targeted value for more
than 500 μs. The PWRGD pin will go low if the output is out-
side the regulation band for more than 500 μs.
Output CrowbarAn added feature of using an N-channel MOSFET as the syn-
chronous switch is the ability to crowbar the output with the
same MOSFET. If the output voltage is 15% greater than the
