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AIC809-46CUTR , 3-PIN MICROPROCESSOR RESET CIRCUITS
AIC809-46CUTR , 3-PIN MICROPROCESSOR RESET CIRCUITS
AIC810-44CUTR , 3-PIN MICROPROCESSOR RESET CIRCUITS
AIC810-44PUTR , 3-PIN MICROPROCESSOR RESET CIRCUITS
AIVR3K42 , APLUS INTEGRATED CIRCUITS INC
AK002M4-31 , GaAs MMIC Control FET in SOT 143 DC-2.5 GHz
ADM9240ARU
Low Cost Microprocessor System Hardware Monitor
REV.0
Low Cost Microprocessor
System Hardware Monitor
FUNCTIONAL BLOCK DIAGRAM
FAN1
SCL
SDA
NTEST_OUT/A0
FAN2CI
INT
NTEST_IN/AOUT
RESET
VID0
VID1
VID2
VID3
VID4
+VCCP1
+2.5VIN
+3.3VIN
+5VIN
+12VIN
+VCCP2
ADM9240
VCC
GNDAGNDD
FEATURES
Six Direct Voltage Measurement Inputs (IncludingTwo
Processor Core Voltages) with On-Chip Attenuators
On-Chip Temperature Sensor
Five Digital Inputs for VID Bits
Fully Supports Intel’s LANDesk Client Manager (LDCM)
Register-Compatible with LM7x Products
Two Fan Speed Monitoring Inputs2C® Compatible System Management Bus (SMBus)
Chassis Intrusion Detect
Interrupt Output
Programmable RESET I/O Pin
Shutdown Mode to Minimize Power Consumption
Limit Comparison of all Monitored Values
APPLICATIONS
Network Servers and Personal Computers
Microprocessor-Based Office Equipment
Test Equipment and Measuring Instruments
PRODUCT DESCRIPTIONThe ADM9240 is a complete system hardware monitor for
microprocessor-based systems, providing measurement and
limit comparison of up to four power supplies and two proces-
sor core voltages, plus temperature, two fan speeds and chassis
intrusion. Measured values can be read out via an I2C-compat-
ible serial System Management Bus, and values for limit com-
parisons can be programmed in over the same serial bus. The
high speed successive approximation ADC allows frequent
sampling of all analog channels to ensure a fast interrupt
response to any out-of-limit measurement.
The ADM9240’s 2.85 V to 5.75 V supply voltage range, low
supply current and I2C compatible interface, make it ideal for a
wide range of applications. These include hardware monitoring
and protection applications in personal computers, electronic
test equipment and office electronics.2C is a registered trademark of Philips Corporation.
ADM9240–SPECIFICATIONS1, 2TEMPERATURE-TO-DIGITAL CONVERTER
ANALOG-TO-DIGITAL CONVERTER
ANALOG OUTPUT
FAN RPM-TO-DIGITAL CONVERTER
DIGITAL OUTPUT NTEST_OUT
(TA = TMIN to TMAX, VCC = VMIN to VMAX, unless otherwise noted)
ADM9240DIGITAL INPUT LOGIC LEVELS
FAN1, FAN2)
SERIAL BUS TIMING
NOTESAll voltages are measured with respect to GND, unless otherwise noted.Typicals are at TA = +25°C and represent most likely parametric norm. Shutdown current typ is measured with VCC = 3.3 V.TUE (Total Unadjusted Error) includes Offset, Gain and Linearity errors of the ADC, multiplexer and on-chip input attenuators, including an external series input
protection resistor value between zero and 1 kΩ.Total monitoring cycle time is the time taken to measure all six analog inputs plus the temperature sensor.The total fan count is based on 2 pulses per revolution of the fan tachometer output.A0 and A1 have internal 75 kΩ pull-down.Timing specifications are tested at logic levels of VIL = 0.3 × VCC for a falling edge and VIH = 0.7 × VCC for a rising edge.
Specifications subject to change without notice.
ADM9240
ABSOLUTE MAXIMUM RATINGS*Positive Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . .6.5 V
Voltage on Any Input or Output Pin . .–0.3 V to (VCC + 0.3 V)
(Except Analog Inputs)
16 V VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+16 V
All Other Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . .+7.5 V
Ground Difference (GNDD–GNDA) . . . . . . . . . . . .±300 mV
Input Current At Any Pin . . . . . . . . . . . . . . . . . . . . . . .±5 mA
Package Input Current . . . . . . . . . . . . . . . . . . . . . . . .±20 mA
Maximum Junction Temperature (TJ max) . . . . . . . . . .150°C
Storage Temperature Range . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature, Soldering
Vapor Phase 60 (sec) . . . . . . . . . . . . . . . . . . . . . . . .+215°C
Infrared 15 (sec) . . . . . . . . . . . . . . . . . . . . . . . . . . .+200°C
ESD Rating All Pins Except Pin 15 . . . . . . . . . . . . . . . .2000 V
ESD Rating Pin 15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .500 V
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
THERMAL CHARACTERISTICS24-Lead Small Outline Package:
θJA = 50°C/Watt, θJC = 10°C/Watt
ORDERING GUIDEFigure 1.Diagram for Serial Bus Timing
PIN CONFIGURATION
PIN FUNCTION DESCRIPTIONS
ADM9240
GENERAL DESCRIPTIONThe ADM9240 is a complete system hardware monitor for
microprocessor-based systems. The device communicates with
the system via a serial System Management Bus. The serial bus
controller has two hardwired address lines for device selection
(Pin 1 and Pin 2), a serial data line for reading and writing
addresses and data (Pin 3), and an input line for the serial clock
(Pin 4). All control and programming functions of the ADM9240
are performed over the serial bus.
An on-chip analog-to-digital converter with six multiplexed
analog inputs measures power supply voltages (+12 V, +5 V,
+3.3 V, +2.5 V—Pins 15 to 18) and processor core voltages
(+VCCP1 and +VCCP2—Pins 19 and 14). The ADC also accepts
input from an on-chip bandgap temperature sensor that moni-
tors system ambient temperature.
Two count inputs (Pins 5 and 6) are provided for monitoring
the speed of fans with tachometer outputs. To accommodate
fans with different speeds and different tacho outputs, a divisor
of 1, 2, 4 or 8 can be programmed into the counter.
Five digital inputs (VID4 to VID0—Pins 20 to 24) read the
processor Voltage ID code, while a chassis intrusion input
(Pin7) is provided to detect unauthorized tampering with the
equipment.
When the ADM9240 monitoring sequence is started, it cycles
sequentially through the measurement of analog inputs and the
temperature sensor, while at the same time the fan speed inputs
are independently monitored. Measured values from these in-
puts are stored in value registers. These can be read out over the
serial bus, or can be compared with programmed limits stored
in the limit registers. The results of out-of-limit comparisons are
stored in the interrupt status registers and will generate an inter-
rupt on the INT line (Pin 10).
Any or all of the Interrupt Status Bits can be masked by appro-
priate programming of the Interrupt Mask Register.
A RESET input/output (Pin 12) is provided. Pulling this pin
low will reset all ADM9240 internal registers to default values.
The ADM9240 can also be programmed to give a low-goingms reset pulse at this pin.
The ADM9240 contains an on-chip, 8-bit digital-to-analog
converter with an output range of zero to 1.25 V (Pin 11). This
is typically used to implement a temperature-controlled fan by
controlling the speed of a fan dependent upon the temperature
measured by the on-chip temperature sensor.
Testing of board level connectivity is simplified by providing a
NAND tree test function. The AOUT (Pin 11) also doubles as
a NAND test input, while Pin 1 doubles as a NAND tree output.
INTERNAL REGISTERS OF THE ADM9240A brief description of the ADM9240’s principal internal regis-
ters is given below. More detailed information on the function
of each register is given in Tables V to XVII.
Configuration Register: Provides control and configuration.
Serial Address Register: Stores the serial bus address of theADM9240.
Address Pointer Register: Contains the address that selectsone of the other internal registers. When writing to the ADM9240,
the first byte of data is always a register address, which is written
to the Address Pointer Register.
Interrupt (INT) Status Registers:Two registers to provide
status of each Interrupt event.
Interrupt (INT) Mask Registers:Allow masking of indi-
vidual Interrupt sources.
Temperature Configuration Register:The configuration of
the temperature interrupt is controlled by the lower three bits of
this register.
VID/Fan Divisor Registers:The status of the VID0 to VID4
pins of the processor can be written to and read from these
registers. Divisor values for fan-speed measurement are also
stored in one of these registers.
Value and Limit Registers:The results of analog voltage
inputs, temperature and fan speed measurements are stored in
these registers, along with their limit values.
Analog Output Register:The code controlling the analog
output DAC is stored in this register.
Chassis Intrusion Clear Register:A signal latched on the
chassis intrusion pin can be cleared by writing to this register.
SERIAL BUS INTERFACEControl of the ADM9240 is carried out via the serial bus. The
ADM9240 is connected to this bus as a slave device, under the
control of a master device, e.g., the PIIX4.
The ADM9240 has a 7-bit serial bus address. When the device
is powered up, it will do so with a default serial bus address.
The five MSBs of the address are set to 01011, the two LSBs
are determined by the logical states of Pin 1(NTEST_OUT/A0)
and Pin 2 (A1) at power-up. These pins have internal 75 kΩ
pull-down resistors, so if they are left open-circuit the default
address will be 0101100.
The facility to make hardwired changes to A1 and A0 allows the
user to avoid conflicts with other devices sharing the same serial
bus, for example if more than one ADM9240 is used in a sys-
tem. Once the ADM9240 has been powered up, the five MSBs
of the serial bus address may be changed by writing a 7-bit word
to the serial Address Pointer Register (the hardwired values of
A0 and A1 cannot be overwritten). Thereafter, the new serial
bus address must be used to select the ADM9240, until it is
changed again, or the device is powered off.
The serial bus protocol operates as follows:The master initiates data transfer by establishing a START
condition, defined as a high-to-low transition on the serial
data line SDA while the serial clock line SCL remains high.
This indicates that an address/data stream will follow. All
slave peripherals connected to the serial bus respond to the
START condition, and shift in the next eight bits, consisting
of a 7-bit address (MSB first) plus an R/W bit, which deter-
mines the direction of the data transfer, i.e., whether data
will be written to or read from the slave device.
The peripheral whose address corresponds to the transmitted
address responds by pulling the data line low during the low
period before the ninth clock pulse, known as the acknowl-
edge bit. All other devices on the bus now remain idle while
the selected device waits for data to be read from or written
to it. If the R/W bit is a 0, the master will write to the slave
device. If the R/W bit is a 1, the master will read from the
slave device.Data is sent over the serial bus in sequences of nine clock
pulses, eight bits of data followed by an acknowledge bit
from the slave device. Transitions on the data line must
occur during the low period of the clock signal and remain
stable during the high period, as a low-to-high transition
when the clock is high may be interpreted as a STOP signal.
The number of data bytes that can be transmitted over the
serial bus in a single READ or WRITE operation is limited
only by what the master and slave devices can handle.When all data bytes have been read or written, stop condi-
tions are established. In WRITE mode, the master will pull
the data line high during the tenth clock pulse to assert a
STOP condition. In READ mode, the master device will
override the acknowledge bit by pulling the data line high
during the low period before the ninth clock pulse. This is
known as No Acknowledge. The master will then take the
data line low during the low period before the tenth clock
pulse, then high during the tenth clock pulse to assert a
STOP condition.
Any number of bytes of data may be transferred over the serial
bus in one operation, but it is not possible to mix read and write
in one operation, because the type of operation is determined at
the beginning and cannot subsequently be changed without
starting a new operation.
In the case of the ADM9240, write operations contain either
one or two bytes, and read operations contain one byte and
perform the following functions:
To write data to one of the device data registers or read data
from it, the Address Pointer Register must be set so that the
correct data register is addressed, then data can be written into
that register or read from it. The first byte of a write operation
always contains an address that is stored in the Address Pointer
Register. If data is to be written to the device, then the write
operation contains a second data byte that is written to the
register selected by the Address Pointer Register.
This is illustrated in Figure 2a. The device address is sent over
the bus followed by R/W set to 0. This is followed by two data
bytes. The first data byte is the address of the internal data
register to be written to, which is stored in the Address Pointer
Register. The second data byte is the data to be written to the
internal data register.
SCL
SDA
ACK. BY
ADM9240
START BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE1
ACK. BY
ADM9240
ACK. BY
STOP BY9
SCL (CONTINUED)
SDA (CONTINUED)
ADM9240When reading data from a register there are two possibilities:If the ADM9240’s Address Pointer Register value is un-
known or not the desired value, it is first necessary to set it to
the correct value before data can be read from the desired
data register. This is done by performing a write to the
ADM9240 as before, but only the data byte containing the
register address is sent, as data is not to be written to the
register. This is shown in Figure 2b.
A read operation is then performed consisting of the serial
bus address, R/W bit set to 1, followed by the data byte read
from the data register. This is shown in Figure 2c.If the Address Pointer Register is known to be already at the
desired address, data can be read from the corresponding
data register without first writing to the Address Pointer
Register, so Figure 2b can be omitted.
Notes:Although it is possible to read a data byte from a data register
without first writing to the Address Pointer Register, if the
Address Pointer Register is already at the correct value, it is
not possible to write data to a register without writing to the
Address Pointer Register, because the first data byte of a
write is always written to the Address Pointer Register.In Figures 2a to 2c, the serial bus address is shown as the
default value 01011(A1)(A0), where A1 and A0 are
hardwired to either Logic 0 or Logic 1.
ANALOG INPUTSThe ADM9240 has six analog inputs. Four of these are dedi-
cated to monitoring the following power supply voltages: +12 V,
+5 V, +3.3 V, +2.5 V.
These inputs are multiplexed into the on-chip, successive ap-
proximation, analog-to-digital converter. This has a resolution
of ten bits, but only eight bits are used for the voltage measure-
ment and limit comparison. The basic input range of the ADC
is 0 V to 2.5 V, and the power supply inputs are scaled by on-
chip attenuators such that the ADC produces an output of 3/4 ×
full scale or 192 decimal, when the input voltage is at its nomi-
nal value. The use of on-chip scaling guarantees accuracy and
removes the need for precision external resistors.
SCL
SDA
ACK. BY
ADM9240
STOP BY
MASTER
START BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE1
ACK. BY
ADM9240Figure 2b.Writing to the Address Pointer Register only
SCL
SDA
NO ACK.
BY MASTER
STOP BY
MASTER
START BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
DATA BYTE FROM ADM92401
ACK. BY
ADM9240Figure 2c.Reading Data from a Previously Selected Register
Table I.A/D Output Code vs. VINThe input ranges of the analog inputs are shown in more detail
in Table I.
The +VCCP1 and +VCCP2 inputs are used to measure processor
core voltages, and have an input range from 0 V to 3.6 V. If
only a single processor core voltage is being monitored, the
VCCP2 input may be used to monitor the –12V supply. This is
achieved by using a resistive divider network referenced to a
known positive dc voltage. This is illustrated in Figure 4.
INPUT CIRCUITSThe internal structure for the analog inputs is shown in Figure
3. Each input circuit consists of an input protection diode, an
attenuator, plus a capacitor to form a first order low-pass filter
which gives the input immunity to high frequency noise.
Figure 3.Internal Structure of Analog Inputs
ADM9240
SETTING OTHER INPUT RANGESIf any of the inputs is unused, and there is a requirement for
monitoring another power supply such as –12V, the input range
of the unused input can easily be scaled and offset to accommo-
date this. For example, if only one processor core voltage is to
be monitored, the unused VCCP input can be used to monitor
another supply voltage.
If the voltage to be monitored is positive, it is simply a matter of
using an input with a lower full scale than the voltage to be
measured and adding an external input attenuator, but bear in
mind that the input resistance (≈140kΩ) of the on-chip attenua-
tor will load the external attenuator. This can be accounted for
in the calculation, but the values of the on-chip attenuator resis-
tors are not precise and vary with temperature. Therefore, the
external attenuator should have a much lower output resistance
to minimize the loading. If this is not acceptable, a buffer ampli-
fier can be used.
If the input voltage range is negative, it must first be converted
to a positive voltage. The simplest way to do this is simply to
attenuate and offset the voltage, as shown in Figure 4, which
shows the +VCCP2 input scaled to measure a –12V input. Using
the values shown, the input range is zero to –13.5V, which will
accommodate a +12.5% tolerance on the nominal value.
–13.2V TO 0V IN<140kV
0V TO 3.6V
+5VFigure 4.Scaling VCCP2 to –12V (+10%)
The resistor ratios are calculated as follows:
R1/R2 = |V–|(max)/V+
(to give zero volts at the input for the most negative value of V–.
R2 has no effect under this condition as the voltage across it is
zero)
and:
(V+ – VFS)/VFS = R2/RP = (R1 and R2 in Parallel)
(to give a voltage VFS at the input when V– is zero, where VFS is
the normal full-scale voltage of the input used).
This is a simple and cheap solution, but the following points
should be noted.Since the input signal is not inverted, an increase in the mag-
nitude of the –12V supply (going more negative), will cause
the input voltage to fall and give a lower output code from
the ADC. Conversely, a decrease in the magnitude of the
–12V supply will cause the ADC code to increase. This
means that the upper and lower limits will be transposed.Since the offset voltage is derived from the +5 V supply,
variations in this supply will affect the ADC code.
It is therefore a good idea to read the value of the +5V sup-
the 5V supply increases the ADC input by the DV × RP/
(R2+RP), while a decrease in the 5V supply correspondingly
decreases the input to the ADC.The on-chip input attenuators will load the external attenua-
tor, as mentioned earlier.
This technique can be applied to any other unused input. By
suitable choice of V+ and the input resistors, a variety of nega-
tive and/or bipolar input ranges can be obtained.
TEMPERATURE MEASUREMENT SYSTEMThe ADM9240 contains an on-chip bandgap temperature sen-
sor. The on-chip ADC performs 9-bit conversions on the output
of this sensor and outputs the temperature data in 9-bit twos
complement format, but only the eight most significant bits are
used for temperature limit comparison. The full 9-bit tempera-
ture data can be obtained by reading the 8 MSBs from the Tem-
perature Value Register (Address 27h) and the LSB from Bit 7
of the Temperature Configuration Register (Address 4Bh).
The format of the temperature data is shown in Table II. Theo-
retically, the temperature sensor and ADC can measure tem-
peratures from –128°C to +127°C with a resolution of 0.5°C,
although temperatures below –40°C and above +125°C are
outside the operating temperature range of the device.
Table II.Temperature Data Format
LIMIT VALUESLimit values for analog measurements are stored in the appro-
priate limit registers. In the case of voltage measurements, high
and low limits can be stored so that an interrupt request will be
generated if the measured value goes above or below acceptable
values. In the case of temperature, a Hot Temperature Limit
can be programmed, and a Hot Temperature Hysteresis Limit,
which will usually be some degrees lower. This can be useful as
it allows the system to be shut down when the hot limit is ex-
ceeded, and automatically restarted when it has cooled down to
a safe temperature.
MONITORING CYCLE TIMEThe monitoring cycle begins when a one is written to the Start
Bit (Bit 0), and a zero to the INT_Clear Bit (Bit 3) of the Con-
figuration Register. INT_Enable (Bit 1) should be set to one to
enable the INT output. The ADC measures each analog input
in turn, starting with VCCP2 and finishing with the on-chip tem-
perature sensor. As each measurement is completed the result
is automatically stored in the appropriate value register. This
“round-robin” monitoring cycle continues until it is disabled by
writing a 0 to Bit 0 of the Configuration Register.
The counter controlling the multiplexer is driven by an on-chip
clock of nominally 22.5 kHz, so the entire measurement sequence
takes (nominally):
44.4 μs×7=310.8 μs
This rapid sampling of the analog inputs ensures a quick re-
sponse in the event of any input going out of limits, unlike other
monitoring chips that employ slower ADCs.
When a monitoring cycle is started, monitoring of the fan speed
inputs begins at the same time as monitoring of the analog in-
puts. However, the two monitoring cycles are not synchronized
in any way, and the monitoring cycle time for the fan inputs is
dependent on fan speed and much slower than for the analog
inputs. For more details see the Fan Speed Measurement section.
INPUT SAFETYScaling of the analog inputs is performed on-chip, so external
attenuators are normally not required. However, since the
power supply voltages will appear directly at the pins, it is advis-
able to add small external resistors in series with the supply
traces to the chip to prevent damaging the traces or power sup-
plies should an accidental short such as a probe connect two
power supplies together.
As the resistors will form part of the input attenuators, they will
affect the accuracy of the analog measurement if their value is
too high. The analog input channels are calibrated assuming an
external series resistor of 500 Ω, and the accuracy will remain
within specification for any value from zero to 1 kΩ, so a stan-
dard 510 Ω resistor is suitable.
The worst such accident would be connecting –12 V to +12 V—
a total of 24 V difference, with the series resistors this would
draw a maximum current of approximately 24 mA.
ANALOG OUTPUTThe ADM9240 has a single analog output from an unsigned
8-bit DAC which produces 0 V–1.25 V. The analog output
register defaults to FF during power-on reset, which produces
maximum fan speed. The analog output may be amplified and
buffered with external circuitry such as an op amp and transistor
to provide fan speed control.
A suitable drive circuit is given in Figure 5.
Care must be taken when choosing the op amp to ensure that its
input common-mode range and output voltage swing are suitable.
The op amp may be powered from the +12 V rail alone or from12 V. If it is powered from +12 V then the input common-
mode range should include ground to accommodate the mini-
If the op amp is powered from –12 V, precautions such as a
clamp diode to ground may be needed to prevent the base-
emitter junction of the transistor being reverse-biased in the
unlikely event that the output of the op amp should swing nega-
tive for any reason.
The positive output swing of the op amp should be as close to
+12 V as possible so that the maximum voltage can be obtained
from the transistor. Even if the op amp swings to the rail, the
maximum voltage from the emitter of the transistor will be
about 11.4 V. typical values for this condition would be:
Gain = 11.4/1.25 = 9.12 = 1 + R1/R2
R1 = 82 kΩ, R2 = 10 kΩ (nearest preferred value)
giving an actual gain of 9.2.
The transistor should have a reasonably high hFE to avoid its
base current pulling down the output of the op amp, it must
have an ICMAX greater than the maximum fan current and be
capable of dissipating power due to the voltage dropped across it
when the fan is not operating at full speed. Depending on the
fan parameters, some suitable devices would be 2N2219A,
2N3019 or ZTX450.
Figure 5.Analog Output Driving Fan
LAYOUT AND GROUNDINGAnalog inputs will provide best accuracy when referred to the
GNDA pin. A separate, low impedance ground plane for analog
ground, which provides a ground point for the voltage dividers
and analog components, will provide best performance but is
not mandatory.
The power supply bypass, the parallel combination of 10 μF
(electrolytic or tantalum) and 0.1 μF (ceramic) bypass capaci-
tors connected between Pin 9 and ground, should also be lo-
cated as close as possible to the ADM9240.
