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ADM8699ADN/a57avai礟 Supervisory Circuit with Watchdog Feature, 4.65V Threshold Voltage, Low Supply Current and Active Low Reset Output. Upgrade for ADM699


ADM8699 ,礟 Supervisory Circuit with Watchdog Feature, 4.65V Threshold Voltage, Low Supply Current and Active Low Reset Output. Upgrade for ADM699features an identical monitoring circuit as in theADM8698, plus an additional watchdog timer input ..
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ADM8699
礟 Supervisory Circuit with 4.65V Threshold Voltage, Low Supply Current and Active Low Reset Output. Upgrade for ADM698
REV.0Microprocessor
Supervisory Circuits
FUNCTIONAL BLOCK DIAGRAM
VCC
WATCHDOG INPUT
WDI*
RESET
WATCHDOG
OUTPUT WDO*
RESET*
*WDI (ADM8699 ONLY)
RESET (SOIC ONLY)
WDO (ADM8699 SOIC ONLY)
TYPICAL APPLICATION CIRCUIT
FEATURES
Superior Upgrade for ADM698/ADM699, MAX698/MAX699
Guaranteed RESET Assertion with VCC = 1 V
Low 70 mA Supply Current
Precision 4.65 V Voltage Monitor
Power OK/Reset Time Delay
Watchdog Timer
Minimum Component Count
Performance Specified over Temperature
APPLICATIONS
Microprocessor Systems
Computers
Controllers
Intelligent Instruments
Automotive Systems
Critical mP Power Monitoring
GENERAL DESCRIPTION

The ADM8698/ADM8699 supervisory circuits provide power
supply monitoring and watchdog timing for microprocessor
systems.
The ADM8698 monitors the 5 V VCC power supply and gener-
ates a RESET pulse during power up, power down and during
low voltage “Brown Out” conditions. The RESET output is
guaranteed to be functional (logic low) with VCC as low as 1 V.
The ADM8699 features an identical monitoring circuit as in the
ADM8698, plus an additional watchdog timer input to monitor
microprocessor activity. The RESET output is forced low if the
watchdog input is not toggled within the 1 second watchdog
timeout period.
Both parts are available in 8-pin plastic DIP/SOIC and 16-lead
SOIC packages. The 16-lead SOIC contains additional out-
puts RESET (without inversion) and Watchdog Output WDO
(ADM8699 only).
ORDERING GUIDE
*N = Plastic DIP; R = Small Outline.
ABSOLUTE MAXIMUM RATINGS*

(TA = +25°C unless otherwise noted)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +6 V
All Other Inputs . . . . . . . . . . . . . . . . . . .–0.3 V to VCC + 0.3 V
Power Dissipation 8-Pin DIP . . . . . . . . . . . . . . . . . . . .500 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . .+120°C/W
Power Dissipation 16-Pin SOIC . . . . . . . . . . . . . . . . .375 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . .+110°C/W
Power Dissipation 8-Pin SOIC . . . . . . . . . . . . . . . . . .500 mW
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . .+125°C/W
Operating Temperature Range
Industrial (A Version) . . . . . . . . . . . . . . . . .–40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . .+300°C
Vapor Phase (60 secs) . . . . . . . . . . . . . . . . . . . . . . .+215°C
Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . . .+220°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>4 kV
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum ratings for
extended periods of time may affect device reliability.
(VCC = +5 V 6 10%, TA = TMIN to TMAX unless otherwise noted)ADM8698/ADM8699–SPECIFICATIONS

Specifications subject to change without notice.
PIN FUNCTION DESCRIPTIONS
RESET
PIN CONFIGURATIONS
8-Lead DIP & SOIC
VCC
VCC
GND
GND
GND
NC (WDI)*
*( ) ADM8699 ONLY
RESET
NC = NO CONNECT
16-Lead SOIC
GND
VCC
VCC
GND
RESET
NC (WDI)*
GND
RESET
NC (WDO)*
*( ) ADM8699 ONLY
NC = NO CONNECT
TYPICAL PERFORMANCE CURVES

Figure 1.RESET Output Voltage vs. VCC
TEMPERATURE – °C
RESET DELAY – ms
180

Figure 2.RESET Timeout Delay vs. Temperature
TEMPERATURE – °C
RESET VOLTAGE THRESHOLD – V
4.55

Figure 3.RESET Voltage Threshold vs. Temperature
ADM8698/ADM8699
C2926–10–2/97
PRINTED IN U.S.A.
CIRCUIT INFORMATION
Power Fail RESET

A precision voltage detector monitors VCC and generates a
RESET output to hold the microprocessor’s Reset line low when
VCC falls below the reset threshold 4.65 V (see Figure 4). The
reset voltage threshold is set to accommodate a 5% variation on
VCC. The voltage detector has 40 mV hysteresis to ensure that
glitches on VCC do not activate the RESET output.
On power-up, an internal monostable holds RESET low for
140 ms after VCC rises above the reset threshold. This allows the
power supply to stabilize on power-up and also prevents repeated
toggling of RESET even if the 5 V power drops out and recovers
with each power line cycle. In order to prevent mistriggering
due to transient voltage spikes, it is recommended that a 0.1μF
capacitor be connected at the VCC pin.
The RESET output is guaranteed to remain low with VCC, as
low as 1 V. This holds the microprocessor in a stable shutdown
condition as the power supply comes up.
On the 16-lead SOIC package, an active high RESET output is
also provided. This is the complement of RESET and is in-
tended for microprocessors requiring an active high signal.VCC
RESET
V1 = RESET VOLTAGE THRESHOLD
V2 = RESET VOLTAGE THRESHOLD +
THRESHOLD HYSTERESIS
t1 = RESET TIME

Figure 4.Watchdog Timeout Period vs. Temperature
Watchdog Timer (ADM8699 Only)

The watchdog timer input (WDI) monitors an I/O line from the
μP system. The μP must toggle this input once every 1.6 sec-
onds to verify correct software execution. Failure to toggle the
line indicates that the μP system is not correctly executing its
program and may be tied up in an endless loop. If this happens,
a reset pulse is generated to initialize the processor.
The WDI input is a three level input and will recognize a low-
to-high or high-to-low transition on its input. The watchdog
timer is reset by each WDI transition and then begins its timeout
period. If the WDI pin remains either high or low, reset pulses
will be issued every 1.6 seconds typically. If the watchdog timer
is not needed, the WDI input should be left floating.
The Watchdog Output (WDO) (SOIC package Only) provides
watchdog status information. It is driven low if WDI is not
toggled within the watchdog timeout period. It goes high at the
next WDI transition. It is also set high when VCC falls below the
reset threshold.
Figure 5.Watchdog Timeout Period and Reset Active Time
OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).
8-Pin Plastic DIP (N-8)8-Pin SOIC (R-8)16-Lead SOIC (R-16)
PIN 1
0.018 (0.46)
0.1 (2.54)
BSC
(3.18)
MIN
0.1574 (4.00)
0.1497 (3.80)
0.2440 (6.20)
0.2284 (5.80)
PIN 1
SEATING
PLANE
0.0098 (0.25)
0.0040 (0.10)
0.0192 (0.49)
0.0138 (0.35)
0.102 (2.59)
0.094 (2.39)
(1.27)
BSC
0.0196 (0.50)
0.0099 (0.25)x 45°0.019 (0.49)0.05 (1.27)
REF
0.012
(0.3)
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