ADM8696ARW-ADM8697ARW Fast Delivery |IC PHOENIX CO.,LIMITED

ADM8697ARW ,Microprocessor Supervisory CircuitsSPECIFICATIONSunless otherwise noted.)Parameter Min Typ Max Units Test Conditions/CommentsV Operati ..
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AIC809-46CUTR , 3-PIN MICROPROCESSOR RESET CIRCUITS
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ADM8696ARW-ADM8697ARW
Microprocessor Supervisory Circuits
FUNCTIONAL BLOCK DIAGRAMS
VOUT
VBATT
VCC
WATCHDOG
INPUT (WDI)
POWER FAIL
INPUT (PFI)POWER FAIL
OUTPUT (PFO)
RESET
BATT ON
OSC IN
OSC SEL
WATCHDOG
OUTPUT (WDO)
RESET
LOW LINELLIN
WATCHDOG
INPUT (WDI)
POWER FAIL
INPUT (PFI)POWER FAIL
OUTPUT (PFO)
RESET
OSC IN
OSC SEL
RESET
LOW LINE
WATCHDOG
OUTPUT (WDO)
LLIN
CEIN
CEOUT
REV.0Microprocessor
Supervisory Circuits
FEATURES
Upgrade for ADM696/ADM697, MAX696/MAX697
Specified Over Temperature
Adjustable Low Line Voltage Monitor
Power OK/Reset Time Delay
Reset Assertion Down to 1 V VCC
Watchdog Timer—100 ms, 1.6 s, or Adjustable
Low Switch On Resistance
0.7 V Normal, 7 V in Backup
400 nA Standby Current
Automatic Battery Backup Switching (ADM8696)
Fast On-Board Gating of Chip Enable Signals (ADM8697)
Voltage Monitor for Power Fail or Low Battery Warning
Also Available in TSSOP Package
APPLICATIONS
Microprocessor Systems
Computers
Controllers
Intelligent Instruments
Automotive Systems
Critical mP Power Monitoring
The ADM8696/ADM8697 is fabricated using an advanced
epitaxial CMOS process combining low power consumption
(0.7 mW), extremely fast Chip Enable gating (2 ns) and high re-
liability. RESET assertion is guaranteed with VCC as low as 1 V.
In addition, the power switching circuitry is designed for mini-
mal voltage drop thereby permitting increased output current drive
of up to 100 mA without the need for an external pass transistor.
GENERAL DESCRIPTION
The ADM8696/ADM8697 supervisory circuits offer complete
single chip solutions for power supply monitoring and battery
control functions in microprocessor systems. These functions
include μP reset, backup battery switchover, watchdog timer,
CMOS RAM write protection and power failure warning.
The ADM8696/ADM8697 are available in 16-pin DIP and small
outline packages (including TSSOP) and provide the following
functions:Power-On Reset output during power-up, power-down and
brownout conditions. The RESET voltage threshold is
adjustable using an external voltage divider. The RESET out-
put remains operational with VCC as low as 1 V.A Reset pulse if the optional watchdog timer has not been
toggled within specified time.Separate watchdog timeout and low line status outputs.Adjustable reset and watchdog timeout periods.A 1.3 V threshold detector for power fail warning, low battery
detection or to monitor a power supply other than VCC.Battery backup switching for CMOS RAM, CMOS micro-
processor or other low power logic (ADM8696).Write protection of CMOS RAM or EEPROM (ADM8697).
ADM8696/ADM8697–SPECIFICATIONS
BATTERY BACKUP SWITCHING (ADM8696)
RESET AND WATCHDOG TIMER
CHIP ENABLE GATING (ADM8697)
OSCILLATOR
(VCC = Full Operating Range, VBATT = +2.8 V, TA = TMIN to TMAX
unless otherwise noted.)
ORDERING GUIDE
*N = Plastic DIP; R = Small Outline (Wide Body); RU = Thin Shrink Small
Outline (TSSOP).
ABSOLUTE MAXIMUM RATINGS*
(TA = +25°C unless otherwise noted)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +6 V
VBATT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +6 V
All Other Inputs . . . . . . . . . . . . . . . . . .–0.3 V to VOUT + 0.5 V
Input Current
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .200 mA
VBATT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50 mA
GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 mA
Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . . .20 mA
Power Dissipation, N-16 DIP . . . . . . . . . . . . . . . . . . .600 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . .135°C/W
Power Dissipation, RU-16 TSSOP . . . . . . . . . . . . . . .500 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . .158°C/W
Power Dissipation, R-16 SOIC . . . . . . . . . . . . . . . . . .600 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . .110°C/W
Operating Temperature Range
Industrial (A Version) . . . . . . . . . . . . . . . . .–40°C to +85°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . .+300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . .+215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . .+220°C
Storage Temperature Range . . . . . . . . . . . . .–65°C to +150°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum ratings for
extended periods of time may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADM8696/ADM8697 features proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
PIN CONFIGURATIONS
GND
VBATT
VOUT
PFI
PFO
WDOVCC
RESET
BATT ON
LOW LINE
OSC IN
OSC SEL
RESET
LLIN
WDILLIN
TEST
PFI
PFO
WDOVCC
RESET
GND
LOW LINE
OSC IN
OSC SEL
RESET
CEIN
CEOUT
WDI
ADM8696/ADM8697
PIN FUNCTION DESCRIPTION
VBATT
VOUT
GND
CEOUT
BATT ON
RESET
Low Line RESET OUTPUT
RESET is an active low output that provides a RESET signal to
the microprocessor whenever the Low Line Input (LLIN) is be-
low 1.3 V. The LLIN input is normally used to monitor the
power supply voltage. An internal timer holds RESET low for
50 ms after the voltage on LLIN rises above 1.3 V. This is in-
tended as a power-on RESET signal for the processor. It allows
time for the power supply and microprocessor to stabilize. On
power-down, the RESET output remains low, with VCC as low
as 1 V. This ensures that the microprocessor is held in a stable
shutdown condition.
The LLIN comparator has approximately 12 mV of hysteresis
for enhanced noise immunity.
In addition to RESET, an active high RESET output is also
available. This is the complement of RESET and is useful for
processors requiring an active high RESET.
Watchdog Timer RESET
The watchdog timer circuit monitors the activity of the micro-
processor in order to check that it is not stalled in an indefinite
loop. An output line on the processor is used to toggle the
Watchdog Input (WDI) line. If this line is not toggled within
the selected timeout period, a RESET pulse is generated. The
ADM8696/ADM8697 may be configured for either a fixed
“short” 100 ms or a “long” 1.6 second timeout period or for an
adjustable timeout period. If the “short” period is selected,
some systems may be unable to service the watchdog timer im-
mediately after a reset, so a “long” timeout is automatically ini-
tiated directly after a reset is issued. The watchdog timer is
restarted at the end of Reset, whether the Reset was caused by
lack of activity on WDI or by LLIN falling below the reset
threshold.
The normal (short) timeout period becomes effective following
the first transition of WDI after RESET has gone inactive. The
watchdog timeout period restarts with each transition on the
WDI pin. To ensure that the watchdog timer does not time out,
either a high-to-low or low-to-high transition on the WDI pin
must occur at or less than the minimum timeout period. If WDI
remains permanently either high or low, reset pulses will be is-
sued after each timeout period (1.6 s). The watchdog monitor
can be deactivated by floating the Watchdog Input (WDI) or by
connecting it to midsupply.
CIRCUIT INFORMATION
Battery Switchover Section (ADM8696)
The battery switchover circuit is designed to switch over to
battery backup in the event of a power failure. When LLIN
is below the reset threshold and VCC is below VBATT, then
VBATT is switched to VOUT.
During normal operation, with VCC higher than VBATT, VCC is
internally switched to VOUT via an internal PMOS transistor
switch. This switch has a typical on resistance of 0.7 Ω and can
supply up to 100 mA at the VOUT terminal. VOUT is normally
used to drive a RAM memory bank which may require instanta-
neous currents of greater than 100 mA. If this is the case, then
a bypass capacitor should be connected to VOUT. The capacitor
will provide the peak current transients to the RAM. A capaci-
tance value of 0.1 μF or greater may be used.
If the continuous output current requirement at VOUT exceeds
100 mA or if a lower VCC–VOUT voltage differential is desired,
an external PNP pass transistor may be connected in parallel
with the internal transistor. The BATT ON output can directly
drive the base of the external transistor.
A 7 Ω MOSFET switch connects the VBATT input to VOUT dur-
ing battery backup. This MOSFET has very low input-to-out-
put differential (dropout voltage) at the low current levels
required for battery backup of CMOS RAM or other low power
CMOS circuitry. The supply current in battery backup is typi-
cally 0.4 μA.
The ADM8696 operates with battery voltages from 2.0 V to
VCC–0.3 V). High value capacitors, either standard electrolytic
or the farad-size double layer capacitors, can also be used for
short-term memory backup. A small charging current of typi-
cally 10 nA (0.1 μA max) flows out of the VBATT terminal. This
current is useful for maintaining rechargeable batteries in a fully
charged condition. This extends the life of the backup battery
by compensating for its self-discharge current. Also note that
this current poses no problem when lithium batteries are used
for backup since the maximum charging current (0.1 μA) is safe
for even the smallest lithium cells.
If the battery switchover section is not used, VBATT should be
connected to GND and VOUT should be connected to VCC.
VBATT
VCC
BATT ON
(ADM8691, ADM8693,
ADM8695, ADM8696)
VOUT
Figure 1.Battery Switchover Schematic
ADM8696/ADM8697
Table I.ADM8696, ADM8697 Reset Pulse Width and Watchdog Timeout Selections
NOTE
With the OSC SEL pin low, OSC IN can be driven by an external clock signal, or an external capacitor can be connected between OSC IN and GND. The nominal
internal oscillator frequency is 10.24 kHz. The nominal oscillator frequency with external capacitor is: FOSC (Hz) = 184,000/C (pF).
WDI
t1 = RESET TIME
t2 = NORMAL (SHORT) WATCHDOG TIMEOUT PERIOD
t3 = WATCHDOG TIMEOUT PERIOD IMMEDIATELY FOLLOWING A RESET
WDO
RESETt1
Figure 3.Watchdog Timeout Period and Reset Active Time
The watchdog timeout period defaults to 1.6 s and the reset
pulse width defaults to 50 ms, but these times to be adjusted as
shown in Table I. Figure 4 shows the various oscillator configu-
rations that can be used to adjust the reset pulse width and
watchdog timeout period.
The internal oscillator is enabled when OSC SEL is high or
floating. In this mode, OSC IN selects between the 1.6 second
and 100 ms watchdog timeout periods. In either case, immedi-
ately after a reset the timeout period is 1.6 s. This gives the mi-
croprocessor time to reinitialize the system. If OSC IN is low,
the 100 ms watchdog period becomes effective after the first
transition of WDI. The software should be written such that the
I/O port driving WDI is left in its power-up reset state until the
initialization routines are completed and the microprocessor is
able to toggle WDI at the minimum watchdog timeout period of
70 ms.
CLOCK
0 TO 500kHz7
Figure 4a.External Clock Source
COSC
Figure 4b.External Capacitor
Figure 4c.Internal Oscillator (1.6 s Watchdog)
Figure 4d.Internal Oscillator (100 ms Watchdog)
Watchdog Output (WDO)
The Watchdog Output WDO provides a status output that goes
low if the watchdog timer “times out” and remains low until set
high by the next transition on the watchdog input. WDO is also
set high when LLIN goes below the reset threshold.

Partno	Mfg	Dc	Qty	Available	Descript
ADM8696ARW	AD	N/a	1	avai	Microprocessor Supervisory Circuits
ADM8697ARW	AD	N/a	25	avai	Microprocessor Supervisory Circuits