ADM812LART-REEL7 ,Microprocessors Supervisory Circuit in 4-Lead SOT-143, Logic High RESET Outputapplications. TheADM811MICROPROCESSORADM811/ADM812 is designed to monitor six different voltages,SY ..
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Microprocessors Supervisory Circuit in 4-Lead SOT-143, Logic High RESET Output
REV.C
Microprocessor Supervisory
Circuit in 4-Lead SOT-143
FEATURES
Superior Upgrade for MAX811/MAX812
Specified over Temperature
Low Power Consumption (5 �A Typ)
Precision Voltage Monitor: 2.5 V, 3 V, 3.3 V, 5 V Options
Reset Assertion Down to 1 V VCC
140 ms Min Power-On Reset
Logic Low RESET Output (ADM811)
Logic High RESET Output (ADM812)
Built-In Manual Reset
APPLICATIONS
Microprocessor Systems
Controllers
Intelligent Instruments
Automotive Systems
Safety Systems
Portable Instruments
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTIONThe ADM811/ADM812 is a reliable voltage monitoring device
suitable for use in most voltage monitoring applications. The
ADM811/ADM812 is designed to monitor six different voltages,
each allowing for a 5% or 10% degradation of standard PSU
voltages before a reset occurs. These voltages have been selected
for the effective monitoring of 2.5 V, 3 V, 3.3 V, and 5 V supply
voltage levels.
Included in this circuit is a debounced manual reset input.
Reset can be activated using an electrical switch (or an input
from another digital device) or by a degradation of the supply
voltage. The manual reset function is very useful, especially if
the circuit in which the ADM811/ADM812 is operating enters
into a state that can only be detected by the user. Allowing the
user to reset a system manually can reduce the damage or
danger that could otherwise be caused by an out-of-control or
locked system.
Figure 1.Typical ADM811 Operating Circuit
ADM811/ADM812–SPECIFICATIONSRESET/RESET Output Voltage
Specifications subject to change without notice.
(VCC = Full Operating Range; TA = TMIN to TMAX; VCC typ = 5 V for L/M,
3.3 V for T/S, 3 V for R, 2.5 V for Z Models; unless otherwise noted.)
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADM811/ADM812 feature proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS*(Typical values are at TA = 25°C, unless otherwise noted.)
Terminal Voltage (With Respect to Ground)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +6 V
All Other Inputs . . . . . . . . . . . . . . . . . –0.3 V to VCC + 0.3 V
Input Current
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 mA
Output Current
RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 mA
Power Dissipation (TA = 70°C)
RT-4, (SOT-143) . . . . . . . . . . . . . . . . . . . . . . . . . .200 mW
Derate by 4 mW/°C above 70°C
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . .330°C/W
Operating Temperature Range . . . . . . . . . . . .–40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . .–65°C to +160°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . .300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . .215°C
Infrared (15 secs) . . . . . . . . . . . . . . . . . . . . . . . . . . . .220°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 kV
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum ratings
for extended periods of time may affect device reliability.
ORDERING GUIDE*Only available in reels.
ADM811/ADM812
PIN CONFIGURATION
PIN FUNCTION DESCRIPTIONS
TEMPERATURE – �C
IDD
– TPC 1.Supply Current vs. Temperature (ADM81_R/S/T/Z)
TPC 2.Power-Down RESET Delay vs. Temperature
(ADM81_R/S/T/Z)
TPC 3.Power-Up Reset Timeout vs. Temperature
TPC 4.Supply Current vs. Temperature (ADM81_L/M)
TPC 5.Power-Down RESET Delay vs. Temperature
(ADM81_L/M)
TPC 6.Reset Threshold Deviation vs. Temperature
ADM811/ADM812
CIRCUIT INFORMATION
Reset ThresholdsA reset output is provided to the microprocessor whenever the
VCC input is below the reset threshold. The actual reset thresh-
old is dependent on whether an L, M, T, S, R, or Z suffix is
used. Refer to Table I.
Table I.Reset Threshold Options
RESET OUTPUTOn power-up and after VCC rises above the reset threshold, an
internal timer holds the reset output active for 240 ms (typical).
This is intended as a power-on reset signal for the processor. It
allows time for both the power supply and the microprocessor to
stabilize after power-up. If a power supply brownout or inter-
ruption occurs, the reset output is similarly activated and remains
active for 240 ms (typical) after the supply recovers. This allows
time for the power supply and microprocessor to stabilize.
The ADM811 provides an active low reset output (RESET)
while the ADM812 provides an active high output (RESET).
During power-down of the ADM811, the RESET output remains
valid (low) with VCC as low as 1V. This ensures that the micro-
processor is held in a stable shutdown condition as the supply
falls and also ensures that no spurious activity can occur via
themicroprocessor as it powers up.
MANUAL RESETThe ADM811/ADM812 is equipped with a manual reset input.
This input is designed to operate in a noisy environment where
unwanted glitches could be induced. These glitches could be
produced by the bouncing action of a switch contact, or where a
manual reset switch may be located some distance away from
the circuit (the cabling of which may pick-up noise).
The manual reset input is guaranteed to ignore logically valid
inputs that are faster than 100 ns and to accept inputs longer in
duration than 10 µs.
Glitch ImmunityThe ADM811/ADM812 contains internal filtering circuitry
providing glitch immunity from fast transient glitches on the
power supply line.
Figure 2.Power Fail RESET Timing
INTERFACING TO OTHER DEVICES
OutputThe ADM811/ADM812 is designed to integrate with as many
devices as possible. One feature of the ADM811/ADM812 is
the reset output, which is directly proportional to VCC (this is
guaranteed only while VCC is greater than 1 V). This enables the
part to be used with both 3 V and 5 V, or any nominal voltage
within the minimum and maximum specifications for VCC.
BENEFITS OF A VERY ACCURATE RESET THRESHOLDBecause the ADM811/ADM812 can operate effectively even when
there are large degradations of the supply voltages, the possibility
of a malfunction during a power failure is greatly reduced. Another
advantage of the ADM811/ADM812 is its very accurate internal
voltage reference circuit. Combined, these benefits produce an
exceptionally reliable microprocessor supervisory circuit.
Figure 3.Ensuring a Valid RESET Output
Down to VCC = 0 V
ENSURING A VALID RESET OUTPUT DOWN TO VCC = 0VWhen VCC falls below 0.8 V, the ADM811/ADM812’s RESET
no longer sinks current. Therefore, a high impedance CMOS
logic input connected to RESET may drift to undetermined
logic levels. To eliminate this problem, a 100 kΩ resistor should
be connected from RESET to ground.
