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ADM809-5SART-REEL7-ADM809-5SART-REEL-7
Microprocessor Supervisory Circuit
REV. 0
Microprocessor
Supervisory Circuit
FUNCTIONAL BLOCK DIAGRAM
VCC
RESET
GND
FEATURES
Specified Over Temperature
Low Power Consumption (17 �A)
Precision Voltage Monitor: 3 V, 5 V Options
Reset Assertion Down to 1 V VCC
30 ms min Power-On Reset
Logic Low RESET Output
APPLICATIONS
Microprocessor Systems
Computers
Controllers
Intelligent Instruments
Automotive Systems
GENERAL DESCRIPTIONThe ADM809-5S/L supervisory circuits monitor the power
supply voltage in microprocessor systems. It provides a reset
output during power-up, power-down and brownout conditions.
On power-up, an internal timer holds reset asserted for 55 ms.
This holds the microprocessor in a reset state until conditions
have stabilized. The RESET output remains operational with
VCC as low as 1 V. The ADM809-5S/L provides an active low
reset signal (RESET).
The reset comparator features built-in glitch immunity,
making it immune to fast transients on VCC.
The ADM809-5S/L consumes only 17 µA, making it suitable
for low power portable equipment.
Figure 1.Typical Operating Circuit
ADM809-5S/L–SPECIFICATIONSReset Threshold Temperature Coefficient
RESET Output Voltage High
(VCC = Full Operating Range, TA = TMIN to TMAX, VCC typ = 5 V for L, 3.3 V for S
Models unless otherwise noted.)
ABSOLUTE MAXIMUM RATINGS*(TA = 25°C unless otherwise noted)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +6 V
RESET, RESET . . . . . . . . . . . . . . . . . .–0.3 V to VCC + 0.5 V
Input Current
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 mA
Output Current
RESET, RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 mA
Rate of Rise, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . .100 V/µs
Power Dissipation, RT-3 SOT-23
Derate by 4 mW/°C above 70°C . . . . . . . . . . . . . . .320 mW
θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . .333°C/W
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . .300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . .215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .220°C
Storage Temperature Range . . . . . . . . . . . . .–65°C to +150°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum ratings for
extended periods of time may affect device reliability.
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADM809-5S/L features proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
PIN FUNCTION DESCRIPTION PIN CONFIGURATION
Figure 2.Power Fail Reset Timing
Table I.RESET Threshold Options
ORDERING GUIDE
ADM809-5S/L
TEMPERATURE – �C–40–20020406080
SUPPLY CURRENTTPC 1.Supply Current vs. Tempera-
ture (No Load)
TEMPERATURE – �C–40–20020406080
RESET DELAYTPC 4.Power-Down RESET Delay vs.
Temperature ADM809-5S
–Typical Performance Characteristics
TITLE
TITLETPC 2.Maximum Transient Duration
Without Causing a RESET Pulse vs.
RESET Comparator Overdrive
TEMPERATURE – �C
THRESHOLDTPC 5.Normalized RESET Voltage
Threshold vs. Temperature
TEMPERATURE – �C–40–20020406080
RESET DELAYTPC 3.Power-Down RESET Delay vs.
Temperature ADM809-5L
INTERFACING TO OTHER DEVICES OUTPUTThe ADM809-5S/L is designed to integrate with as many devices
as possible and therefore has an output dependant on VCC.
Because of this design approach, interfacing this device to other
devices is simplified.
ENSURING A VALID RESET OUTPUT DOWN TO VCC = 0VWhen VCC falls below 0.8 V, ADM809-5S/L’s RESET no longer
sinks current. A high impedance CMOS logic input connected
to RESET may, therefore, drift to undetermined logic levels. To
eliminate this problem a 100 kΩ resistor should be connected
from RESET to ground.
Figure 3.Ensuring a Valid RESET Output Down to
VCC = 0 V
THE BENEFITS OF A VERY ACCURATE RESET
THRESHOLDIn other microprocessor supervisory circuits, tolerances in supply
voltages lead to an overall increase in RESET tolerance levels
due to the deterioration of the microprocessor RESET circuit’s
power supply. The possibility of a malfunction during a power
failure is greatly reduced because the ADM809-5S/L series can
operate effectively even when there are large degradations of the
supply voltages. Another advantage of the ADM809-5S/L series
is its very accurate internal voltage reference circuit. These
benefits combine to produce an exceptionally reliable Voltage
Monitor Circuit.
INTERFACING TO MICROPROCESSORS WITH
MULTIPLE INTERRUPTSIn a number of cases it is necessary to interface many interrupts
from different devices (i.e., thermal, attitude, and velocity sen-
sors). The ADM809-5S/L can easily be integrated into existing
interrupt-handling circuits (Figure 6) or used as a stand-alone
device.
Figure 4.Interfacing to µPs with Multiple Interrupts
Figure 5.Alternative Application Circuit with Extra
Decoupling
Figure 6.Additional Decoupling Can Be Achieved
Using a 100nF Capacitor Between VCC and Ground
ADM809-5S/L
OUTLINE DIMENSIONSDimensions shown in inches and (mm).
Surface Mount Package
RT-3C00090–2.5–9/00 (rev. 0)
PRINTED IN U.S.A.
