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ADM663AAN-ADM663AAR-ADM666AAR
Tri-Mode: +3.3 V, +5 V, Adjustable Micropower Linear Voltage Regulators
REV.0
Tri-Mode: +3.3 V, +5 V, Adjustable
Micropower Linear Voltage Regulators
FEATURES
Tri-Mode Operation
3.3 V, 5 V Fixed or +1.3 V to +16 V Adjustable
Low Power CMOS: 9 μA max Quiescent Current
High Current 100 mA Output
Low Dropout Voltage
Upgrade for ADM663/ADM666
“Small” 0.1 μF Output Capacitor (0805 Style)
+2 V to +16.5 V Operating Range
Low Battery Detector ADM666A
No Overshoot on Power-Up
Thermal Shutdown
APPLICATIONS
Handheld Instruments
LCD Display Systems
Pagers
Battery Operated Equipment
GENERAL DESCRIPTIONThe ADM663A/ADM666A are precision linear voltage regula-
tors featuring a maximum quiescent current of 9 μA. They can
be used to give a fixed +3.3 V or +5 V output with no additional
external components or can be adjusted from 1.3 V to 16 V
using two external resistors. Fixed or adjustable operation is au-
tomatically selected via the VSET input. The low quiescent cur-
rent makes these devices especially suitable for battery powered
systems. The input voltage range is 2 V to 16.5 V, and an out-
put current up to 100 mA is provided. Current limiting may be
set using a single external resistor. For additional safety, an
internal thermal shutdown circuit monitors the internal die
temperature.
The ADM666A features additional low battery monitoring cir-
cuitry to detect for low battery voltages.
The ADM663A/ADM666A are pin compatible enhancements
for the ADM663/ADM666. Improvements include an addi-
tional 3.3 V output range, higher output current, and operation
with a small output capacitor.
The ADM663A/ADM666A are available in an 8-pin DIP and
narrow surface mount (SOIC) packages.
*Patent pending.
FUNCTIONAL BLOCK DIAGRAMS
(VIN = +9 V, TA = TMIN to TMAX, unless otherwise noted)
ABSOLUTE MAXIMUM RATINGS*(TA = +25°C unless otherwise noted)
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+18 V
Terminal Voltage
(ADM663A) Pins 1, 3, 5, 6, 7
. . . . . . . . . . . . . . . . . . . . . .(GND – 0.3 V) to (VIN + 0.3 V)
(ADM666A) Pins 1, 2, 3, 5, 6
. . . . . . . . . . . . . . . . . . . . . . .(GND – 0.3 V) to (VIN + 0.3 V)
(ADM663A)Pin 2 . . . . . . . .(GND – 0.3 V) to (VOUT1 + 0.3 V)
(ADM666A)Pin 7 . . . . . . . . . . . . . .(GND – 0.3 V) to +16.5 V
Output Source Current
(ADM663A, ADM666A) Pin 2 . . . . . . . . . . . . . . . . . .100 mA
(ADM663A) Pin 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 mA
Output Sink Current, Pin 7 . . . . . . . . . . . . . . . . . . . . . .–20 mA
ADM663A/ADM666A–SPECIFICATIONSPower Dissipation, R-8 . . . . . . . . . . . . . . . . . . . . . . . .570 mW
(Derate 6 mW/°C above +30°C)
θJA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . .170°C/W
Operating Temperature Range
Industrial (A Version) . . . . . . . . . . . . . . . . .–40°C to +85°C
Storage Temperature Range . . . . . . . . . . . .–65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . .+300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . .+215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . .+220°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>5000 V
*This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operation sections of this specifica-
tion is not implied. Exposure to absolute maximum rating conditions for extended
periods of time may affect reliability.
Quiescent Current, IQ
Output Voltage, VOUT(2) (+3.3 V Mode)
Dropout Voltage, VDO
Line Regulation (ΔVOUT(2)/ΔVIN)
Reference Voltage, VSET
Shutdown Input Voltage, VSHDN
SENSE Input Threshold, VOUT – VSENSE
SENSE Input Resistance, RSENSE
Output Current, IOUT(2)
Minimum Load Current, IL (MIN)
LBO Output Saturation Resistance, RSAT
LBO Output Leakage Current
VTC Open Circuit Voltage, VTC
VTC Sink Current, ITC
Specifications subject to change without notice.
PIN FUNCTION DESCRIPTIONVIN
SENSE
VTC
PIN CONFIGURATIONS
DIP & SOIC
DIP & SOIC
ORDERING GUIDE
TERMINOLOGY
Dropout Voltage:The input/output voltage differential at
which the regulator no longer maintains regulation against fur-
ther reductions in input voltage. It is measured when the output
decreases 100 mV from its nominal value. The nominal value is
the measured value with VIN = VOUT +2 V.
Line Regulation:The change in output voltage as a result of
a change in the input voltage. It is specified as a percentage
change in output voltage for an input voltage change.
LineReg=
ΔVOUTOUT
(100)IN
Load Regulation:The change in output voltage for a change
in output current.
LoadReg(Ω)=ΔVOUT
ΔIOUT
Quiescent Current:The input bias current which flows when
the regulator output is unloaded or when the regulator is in
shutdown.
Sense Input Threshold:Current limit sense voltage. This
is the voltage (referenced to VOUT(2)) at which current limiting
occurs.
Input-Output Saturation Resistance (ADM663A):This is a
measure of the internal MOS transistor effective resistance in se-
ries with VOUT1. The minimum input-output voltage differential
at low currents may be calculated by multiplying the load cur-
rent by the saturation resistance.
Thermal Limiting: This feature monitors the internal die tem-
perature and disables the output when an internal temperature
of 125°C is reached.
Maximum Power Dissipation:The maximum total device
dissipation for which the regulator will continue to operate
within specifications.
ADM663A/ADM666A
GENERAL INFORMATIONThe ADM663A/ADM666A contains a micropower bandgap
reference voltage source; an error amplifier, A1; three compara-
tors, C1, C2, C3, and a series pass output transistor. A P-chan-
nel FET and an NPN transistor are used on the ADM663A
while the ADM666A uses an NPN output transistor.
CIRCUIT DESCRIPTIONThe internal bandgap reference is trimmed to 1.3 V ± 30 mV.
This is used as a reference input to the error amplifier A1. The
feedback signal from the regulator output is supplied to the
other input by an on-chip voltage divider or by two external re-
sistors. When VSET is at ground, the internal divider tap between
R1 and R2, provides the error amplifier’s feedback signal giving
a +5 V output. When VSET is at VIN, the internal divider tap be-
tween R2 and R3 provides the error amplifier’s feedback signal
giving a +3.3 V output. When VSET is at more than 50 mV
above ground and less than 50 mV below VIN, the error ampli-
fier’s input is switched directly to the VSET pin, and external
resistors are used to set the output voltage. The external resis-
tors are selected so that the desired output voltage gives 1.3 V
at VSET.
Comparator C1 monitors the output current via the SENSE in-
put. This input, referenced to VOUT(2), monitors the voltage
drop across a load sense resistor. If the voltage drop exceeds
0.5 V, then the error amplifier A1 is disabled and the output
current is limited.
The ADM663A has an additional amplifier, A2, which provides
a temperature proportional output, VTC. If this is summed into
the inverting input of the error amplifier, a negative temperature
coefficient results at the output. This is useful when powering
liquid crystal displays over wide temperature ranges.
The ADM666A has an additional comparator, C4, that com-
pares the voltage on the low battery input, LBI, pin to the inter-
nal +1.3 V reference. The output from the comparator drives an
open drain FET connected to the low battery output pin, LBO.
The low battery threshold may be set using a suitable voltage
divider connected to LBI. When the voltage on LBI falls below
1.3 V, the open drain output LBO is pulled low.
Both the ADM663A and the ADM666A contain a shutdown
(SHDN) input that can be used to disable the error amplifier
and hence the voltage output. The power consumption in shut-
down reduces to less than 9 μA.
Figure 2.ADM666A Functional Block Diagram
Circuit ConfigurationsFor a fixed +5 V output the VSET input is grounded and no ex-
ternal resistors are necessary. This basic configuration is shown
in Figure 3. For a fixed +3.3 V output, the VSET input is con-
nected to VIN as shown in Figure 4. Current limiting is not be-
ing utilized so the SENSE input is connected to VOUT(2).
Figure 3.A Fixed +5 V Output
Output Voltage SettingIf VSET is not connected to GND or to VIN, the output voltage is
set according to the following equation:
the current drain to a low quiescent (9 μA maximum) current.
This is very useful for low power applications. The SHDN input
should be driven with a CMOS logic level signal since the input
threshold is 0.3 V. In TTL systems, an open collector driver
with a pull-up resistor may be used.
If the shutdown function is not being used, then it should be
connected to GND.
Low Supply or Low Battery DetectionThe ADM666A contains on-chip circuitry for low power supply
or battery detection. If the voltage on the LBI pin falls below the
internal 1.3 V reference, then the open drain output LBO will
go low. The low threshold voltage may be set to any voltage
above 1.3 V by appropriate resistor divider selection. =R4VBATT
1.3V−1
where R3 and R4 are the resistive divider resistors and VBATT is
the desired low voltage threshold.
Since the LBI input leakage current is less than 10 nA, large val-
ues may be selected for R3 and R4 in order to minimize loading.
For example, a 6 V low threshold may be set using 10 MΩ for
R3 and 2.7 M Ω for R4.
Figure 6. ADM666A Adjustable Output with Low Battery
Detection
High Current OperationThe ADM663A contains an additional output, VOUT1, suitable
for directly driving the base of an external NPN transistor. Fig-
ure 7 shows a configuration which can be used to provide +5 V
with boosted current drive. A 1 Ω current sensing resistor limits
the current at 0.5 A.
The resistor values may be selected by first choosing a value for
R1 and then selecting R2 according to the following equation: =R1×VOUT
1.30−1
The input leakage current on VSET is 10 nA maximum. This al-
lows large resistor values to be chosen for R1 and R2 with little
degradation in accuracy. For example, a 1 MΩ resistor may be
selected for R1, and then R2 may be calculated accordingly.
The tolerance on VSET is guaranteed at less than ±30 mV so in
most applications, fixed resistors will be suitable.
Figure 5.Adjustable Output
Current LimitingCurrent limiting may be achieved by using an external current
sense resistor in series with VOUT(2). When the voltage across
the sense resistor exceeds the internal 0.5 V threshold, current
limiting is activated. The sense resistor is therefore chosen such
that the voltage across it will be 0.5 V when the desired current
limit is reached. CL=0.5
ICL
where RCL is the current sense resistor, ICL is the maximum
current limit.
The value chosen for RCL should also ensure that the current is
limited to less than the 100 mA absolute maximum rating and
also that the power dissipation will also be within the package
maximum ratings.
If current limiting is employed, there will be an additional volt-
age drop across the sense resistor that must be considered when
determining the regulators dropout voltage.
If current limiting is not used, the SENSE input should be con-
nected to VOUT(2).
Shutdown Input (SHDN)The SHDN input allows the regulator to be turned off with a
logic level signal. This will disable the output and reduce
Table I.Output Voltage Selection
ADM663A/ADM666A
Temperature Proportional OutputThe ADM663A contains a VTC output with a positive tempera-
ture coefficient of +2.5 mV/°C. This may be connected to the
summing junction of the error amplifier (VSET) through a resis-
tor resulting in a negative temperature coefficient at the output
of the regulator. This is especially useful in multiplexed LCD
displays to compensate for the inherent negative temperature
coefficient of the LCD threshold. At +25°C the voltage at the
VTC output is typically 0.9 V. The equations for setting both
the output voltage and the tempco are given below. If this func-
tion is not being used, then VTC should be left unconnected. OUT=VSET1+R2+R2VSET−VTC()
TCVOUT=±R2TCVTC()
where VSET = +1.3 V, VTC = +0.9 V, TCVTC = +2.5 mV/°C
Figure 8.ADM663A Temperature Proportional Output
APPLICATION HINTS
Input-Output (Dropout Voltage)A regulator’s minimum input-output differential or dropout
voltage determines the lowest input voltage for a particular out-
put voltage. The ADM663A/ADM666A dropout voltage is 1 V
at its rated output current. For example when used as a fixed
+5 V regulator, the minimum input voltage is +6 V. At lower
output currents (IOUT < 10 mA) on the ADM663A, VOUT1 may
be used as the output driver in order to achieve lower dropout
voltages. In this case the dropout voltage depends on the voltage
drop across the internal FET transistor. This may be calculated
by multiplying the FET’s saturation resistance by the output
current, for example with VIN = 9 V, RSAT = 20 Ω. Therefore,
the dropout voltage for 5 mA is 100 mV. As the current limit
circuitry is referenced to VOUT2, VOUT2 should be connected to
VOUT1. For high current operation VOUT2 should be used alone
and VOUT1 left unconnected.
Figure 9.Low Current, Low Dropout Configuration
be kept within the maximum limits. The package power dissi-
pation is calculated from the product of the voltage differential
across the regulator times the current being supplied to the load.
The power dissipation must be kept within the maximum limits
given in the Absolute Maximum Ratings section.
PD = (VIN–VOUT)(IL)
The die temperature is dependent on both the ambient tempera-
ture and on the power being dissipated by the device. The
ADM663A/ADM666A contains an internal thermal limiting cir-
cuit which will shut down the regulator if the internal die tem-
perature exceeds 125°C. Therefore, care must be taken to
ensure that, under normal operating conditions, the die tem-
perature is kept below the thermal limit.
TJ = TA + PD (θJA)
This may be expressed in terms of power dissipation as follows:
PD = (TJ – TA)/(θJA)
where:
TJ = Die Junction Temperature (°C)
TA = Ambient Temperature (°C)
PD = Power Dissipation (W)
θJA = Junction to Ambient Thermal Resistance (°C/W)
If the device is being operated at the maximum permitted ambi-
ent temperature of 85°C the maximum power dissipation per-
mitted is:
PD (max) = (TJ (max) – TA)/(θJA)
PD (max) = (125 – 85)/(θJA)
= 40/θJA
θJA = 120°C/W for the 8-pin DIP (N-8) package
θJA = 170°C/W for the 8-pin SOIC (R-8) package
Therefore, for a maximum ambient temperature of 85°C
PD (max) = 333 mW for N-8
PD (max) = 235 mW for R-8
At lower ambient temperatures the maximum permitted power
dissipation increases accordingly up to the maximum limits
specified in the absolute maximum specifications.
The thermal impedance (θJA) figures given are measured in still
air conditions and are reduced considerably where fan assisted
cooling is employed. Other techniques for reducing the thermal
impedance include large contact pads on the printed circuit
board and wide traces. The copper will act as a heat exchanger
thereby reducing the effective thermal impedance.
High Power Dissipation RecommendationsWhere excessive power dissipation due to high input-output dif-
ferential voltages and or high current conditions exists, the sim-
plest method of reducing the power requirements on the
regulator is to use a series dropper resistor. In this way the ex-
cess power can be dissipated in the external resistor. As an ex-
ample, consider an input voltage of +12 V and an output
voltage requirement of +5 V @ 100 mA with an ambient tem-
perature of +85°C. The package power dissipation under these
