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ADM6315-26D1ARTRL7 |ADM631526D1ARTRL7ADN/a3400avai2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143
ADM6315-26D2ART-RL |ADM631526D2ARTRLADN/a3000avai2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143
ADM6315-26D2ARTRL7 |ADM631526D2ARTRL7ADN/a3000avai2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143
ADM6315-26D2ART-RL7 |ADM631526D2ARTRL7ADN/a4610avai2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143
ADM6315-26D2ARTZR7 |ADM631526D2ARTZR7ADN/a6000avai2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143
ADM6315-26D3ART-RL |ADM631526D3ARTRLADN/a3000avai2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143
ADM6315-26D3ARTZR7 |ADM631526D3ARTZR7ADN/a2931avai2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143
ADM6315-26D4ARTZR7 |ADM631526D4ARTZR7ADN/a6427avai2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143
ADM6315-26D4ARTZR7 |ADM631526D4ARTZR7ADIN/a200avai2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143
ADM6315-29D2ARTRL7 |ADM631529D2ARTRL7ADN/a1000avai2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143
ADM6315-29D2ART-RL7 |ADM631529D2ARTRL7ADN/a6134avai2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143
ADM6315-29D3ART-RL7 |ADM631529D3ARTRL7ADN/a260avai2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143
ADM6315-29D4ARTRL7 |ADM631529D4ARTRL7ADN/a915avai2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143
ADM6315-31D2ARTRL7 |ADM631531D2ARTRL7ADN/a749avai2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143
ADM6315-44D2ART-RL |ADM631544D2ARTRLADN/a7500avai2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143
ADM6315-44D3ARTRL7 |ADM631544D3ARTRL7ADN/a600avai2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143
ADM6315-44D3ART-RL7 |ADM631544D3ARTRL7ADN/a3015avai2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143


ADM6315-44D2ART-RL ,2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143Specifications subject to change without notice.–2– REV. CADM6315ABSOLUTE MAXIMUM RATINGS* PIN CONF ..
ADM6315-44D3ARTRL7 ,2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143SPECIFICATIONS otherwise noted.)Parameter Min Typ Max Unit Test Conditions/CommentsSUPPLYOperating ..
ADM6315-44D3ART-RL7 ,2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143FEATURES FUNCTIONAL BLOCK DIAGRAMSpecified over TemperatureLow Power Consumption (5 A Typ)Precisio ..
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ADM6315-46D3ARTRL7 , Open-Drain Microprocessor Supervisory Circuit in 4-Lead SOT-143
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ADM6315-26D1ARTRL7-ADM6315-26D2ART-RL-ADM6315-26D2ARTRL7-ADM6315-26D2ART-RL7-ADM6315-26D2ARTZR7-ADM6315-26D3ART-RL-ADM6315-26D3ARTZR7-ADM6315-26D4ARTZR7-ADM6315-29D2ARTRL7-ADM6315-29D2ART-RL7-ADM6315-29D3ART-RL7-ADM6315-29D4ARTRL7-ADM6315-31D2ARTRL7-ADM6315-44D2ART-RL-ADM6315-44D3ARTRL7-ADM631
2.5 V to 5 V at 100 mV Increments Supervisory Circuit in 4-Lead SOT-143
REV.C
Open-Drain Microprocessor
Supervisory Circuit in 4-Lead SOT-143
FUNCTIONAL BLOCK DIAGRAM

Figure 1.Typical Operating Circuit
FEATURES
Specified over Temperature
Low Power Consumption (5 �A Typ)
Precision Voltage Monitor of Voltages from 2.5V to5V
at 100 mV Increments
Reset Assertion Down to VCC > 1 V
Reset Timeout Periods: 1 ms, 20ms, 140ms,1120ms (Min)
Built-In Manual Reset
Pin Compatible with the ADM811
Available in SOT-143 Package
APPLICATIONS
Microprocessor Systems
Controllers
Intelligent Instruments
Automotive Systems
Safety Systems
Portable Instruments
GENERAL DESCRIPTION

The ADM6315 is a reliable voltage monitoring device that is
suitable for use in most voltage monitoring applications.
The ADM6315 is designed to monitor as little as a 1.8% degra-
dation of a power supply voltage. Voltages that can be monitored
by the ADM6315 are all voltages (at 100 mV increments) from
2.5V to 5V.
Included in this circuit is a debounced manual reset input. RESET
can be activated using an ordinary switch (pulling MR low), a low
input from another digital device, or a degradation of the supply
voltage. The manual reset function is very useful, especially if the
circuit in which the ADM6315 is operating enters into a state that
can be detected only by the user. Allowing the user to manually
reset a system can reduce the damage or danger that could other-
wise be caused by an out-of-control or locked-up system.
The ADM6315 comes in a cost and space efficient SOT-143
package.
ADM6315–SPECIFICATIONS
(VCC = Full Operating Range, TA = TMIN to TMAX, VCC Typ = 5 V, unless
otherwise noted.)

RESET VOLTAGE
RESET ACTIVE TIMEOUT PERIOD
RESET OUTPUT
Specifications subject to change without notice.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADM6315 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
ABSOLUTE MAXIMUM RATINGS*

(TA = 25°C, unless otherwise noted.)
Terminal Voltage (With Respect to Ground)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +6 V
All Other Inputs . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V
Input Current
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 mA
Output Current
RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 mA
Power Dissipation (TA = 70°C)
RA-4, SOT-143
Derate by 4 mW/°C above 70°C . . . . . . . . . . . . . .320 mW
�JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . .330°C/W
Operating Temperature Range . . . . . . . . . . –40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +160°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . .300°C
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . .215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . .220°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.5 kV
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum ratings
for extended periods may affect device reliability.
PIN CONFIGURATION
PIN FUNCTION DESCRIPTIONS

ADM6315
ADM6315-45D1ART-RL7
ADM6315-44D1ART-RL7
ADM6315-31D1ART-RL7
ADM6315-29D1ART-RL7
ADM6315-26D1ART-RL7
ADM6315-46D2ART-RL7
ADM6315-45D2ART-RL7
ADM6315-44D2ART-RL7
ADM6315-31D2ART-RL7
ADM6315-29D2ART-RL7
ADM6315-26D2ART-RL7
ADM6315-46D3ART-RL7
ADM6315-45D3ART-RL7
ADM6315-44D3ART-RL7
ADM6315-31D3ART-RL7
ADM6315-29D3ART-RL7
ADM6315-26D3ART-RL7
ADM6315-46D4ART-RL7
ADM6315-45D4ART-RL7
ADM6315-44D4ART-RL7
ADM6315-31D4ART-RL7
ADM6315-29D4ART-RL7
ADM6315-26D4ART-RL7
ORDERING GUIDE
TPC 1.Supply Current vs. Temperature
TPC 2.Power-Down Reset Delay vs. Temperature
TPC 3.Normalized Reset Timeout Period vs.
Temperature (VCC Rising)
TPC 4.Maximum Transient Duration vs. RESET
Comparator Overdrive
TPC 5.Normalized Reset Threshold vs. Temperature
(VCC Falling)
TPC 6.Supply Current vs. Supply Voltage
ADM6315
INTERFACING TO OTHER DEVICES’ OUTPUT

The ADM6315 series is designed to integrate with as many
devices as possible. One feature of the ADM6315 is the RESET
open-drain output, which can sink current from sources with a
voltage greater than the VCC of the ADM6315 input, making it
suitable for use in more diverse applications.
BENEFITS OF A VERY ACCURATE RESET THRESHOLD

Because the ADM6315 series can operate effectively even when
there are large degradations of the supply voltages (due to an
accurate internal voltage reference circuit), the possibility of a
malfunction during a power failure is greatly reduced.
Figure 2.VCC Power-Down/Brownout Timing Diagram
DETAILED DESCRIPTION

The ADM6315 is designed to protect the integrity of a system’s
operation by ensuring the proper operation of the system during
power-up, power-down, and brownout conditions.
When the ADM6315 is powered up (depending on the selected
reset active timeout), the RESET output of the ADM6315
remains low for a period typically equal to the reset active timeout
period. This is designed to give the system time to powerup
correctly and for the power supply to stabilize before any devices
are brought out of reset and allowed to begin executing instruc-
tions. Initializing a system in this way provides a more reliable
startup for microprocessor systems.
When a brownout condition occurs (assuming VCC is falling atmV/µs), the ADM6315 produces a reset in typically 35µs.
Producing a reset this fast means that the entire system can be
reset together before any part of the system’s voltage falls below
its recommended operating voltage. This can avoid dangerous
and/or erroneous operation of a microprocessor based system.
MANUAL RESET INPUT

The ADM6315 also provides an additional input, MR. This
input can be used either as a means for the system operator to
manually reset the system via a switch or for a digital circuit to
reset the system.
The MR input (typically) ignores negative going pulses faster
than 100 ns and is guaranteed to accept any negative going input
pulse of a duration greater than or equal to 1µs. If MR is con-
nected to long cables or is used in a noisy environment, then placing
a 1µF decoupling capacitor between the MR input and ground
further improves the glitch immunity of the ADM6315.
Figure 3.VCC Power-Up Timing Diagram
TRANSIENT IMMUNITY

As well as being an accurate reset circuit, the ADM6315 has
good immunity to negative going transients (TPC 4). Because
of this characteristic, the ADM6315 is suitable for use in noisy
environments.
TPC 4 shows the reset comparator overdrive (the maximum mag-
nitude of negative going pulses with respect to the typical reset
threshold) versus the pulse duration, without causing a reset.
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