ADM560JRSZ ,Ultralow Power, Active Low Shutdown and Active High Receiver Enablefeatures a high level of over-voltage protection and latch-up immunity. The receiver inputsREV. 0In ..
ADM560JRZ , Ultralow Power 3.3 V, RS-232 Notebook PC Serial Port Drivers/Receivers
ADM560JRZ , Ultralow Power 3.3 V, RS-232 Notebook PC Serial Port Drivers/Receivers
ADM561 ,Ultralow Power, Active High Shutdown and an Active Low Receiver EnableGENERAL DESCRIPTION23 R4R4OUT 22 R4 INThe ADM560/ADM561 are four driver/five receiver interfacedevi ..
ADM561JR ,Ultralow Power, +3.3 V, RS-232 Notebook PC Serial Port Drivers/ReceiversGENERAL DESCRIPTION23 R4R4OUT 22 R4 INThe ADM560/ADM561 are four driver/five receiver interfacedevi ..
ADM561JRS ,Ultralow Power, +3.3 V, RS-232 Notebook PC Serial Port Drivers/ReceiversSPECIFICATIONS unless otherwise noted.)Parameter Min Typ Max Units Test Conditions/CommentsOutput V ..
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ADM560JRS-REEL-ADM560JRSZ-ADM561JRS-REEL
Ultralow Power, Active Low Shutdown and Active High Receiver Enable
FUNCTIONAL BLOCK DIAGRAMREV.0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
Ultralow Power, +3.3 V, RS-232
Notebook PC Serial Port Drivers/Receivers
FEATURES
RS-232 Compatible
Operates with 3 V or 5 V Logic
Ultralow Power CMOS:1.3 mA Operation
Low Power Shutdown: 0.2 μA
Suitable for Serial Port Mice
116 kbits/s Data Rate
1 μF Charge Pump Capacitors
Single +3 V to +3.6 V Power Supply
Two Receivers Active in Shutdown (ADM560)
APPLICATIONS
Laptop Computers
Palmtop Computers
Notebook Computers
Peripherals
Modems
Printers
Battery Operated Equipment
GENERAL DESCRIPTIONThe ADM560/ADM561 are four driver/five receiver interface
devices designed to meet the EIA-232 standard while operating
with a single +3.3 V power supply. The devices feature an on-
board dc-to-dc converter, eliminating the need for dual ±5 V
power supplies. This dc-dc converter contains a voltage doubler
and voltage inverter which internally generates ±6.6 V from the
input +3.3 V power supply.
The ADM560 and ADM561 consume only 5 mW making
them ideally suited for battery and other power-sensitive appli-
cations. A shutdown facility is also provided which reduces the
power to 0.66 μW.
The ADM560 contains active low shutdown and active high
receiver enable signals. In shutdown mode, two receivers remain
active thereby allowing monitoring of peripheral devices. This
feature allows the device to be shut down until a peripheral
device begins communication. The active receivers can alert the
processor which can then take the ADM560 out of the shut-
down mode.
The ADM561 features active high shutdown and an active
low receiver enable. In this device all receivers are disabled in
shutdown.
The ADM560/ADM561 is fabricated using CMOS technology
for minimal power consumption. It features a high level of over-
voltage protection and latch-up immunity. The receiver inputs
Specifications subject to change without notice.
ADM560/ADM561–SPECIFICATIONS
(VCC = +3.3 V ±10%, C1–C4 = 1 μF. All specifications TMIN to TMAX
unless otherwise noted.)
ABSOLUTE MAXIMUM RATINGS*(TA = +25°C unless otherwise noted)
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V to +6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . .(VCC –0.3 V) to +14 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+0.3 V to –14 V
Input Voltages
TIN . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (V+, +0.3 V)
RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±25 V
Output Voltages
TOUT . . . . . . . . . . . . . . . . . . . (V+, +0.3 V) to (V–, –0.3 V)
ROUT . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (VCC +0.3 V)
Short Circuit Duration
TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous
Power Dissipation
SSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .900mW
SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .900mW
Operating Temperature Range
Commercial (J Version) . . . . . . . . . . . . . . . . . .0°C to +70°C
Storage Temperature Range . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature (Soldering, 10 sec). . . . . . . . . . . . .+300°C
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>2000V
*This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operation sections of this specifica-
tion is not implied. Exposure to absolute maximum rating conditions for extended
periods of time may affect reliability.
Table I.
PIN FUNCTION DESCRIPTION
PIN CONFIGURATIONS
ADM560/ADM561
GENERAL DESCRIPTIONThe ADM560/ADM561 are RS-232 transmission line drivers/
receivers which operate from a single +3.3 V supply. This is
achieved by integrating step up voltage converters and level
shifting transmitters and receivers onto the same chip. CMOS
technology is used to keep the power dissipation to an absolute
minimum. The ADM560/ADM561 is a modification, enhance-
ment and improvement to the AD230–AD241 family and
derivatives thereof. It is essentially plug-in compatible and does
not have materially different applications.
The ADM560/ADM561 contains an internal voltage doubler
and a voltage inverter which generates ±6.6V from the +3.3 V
input. Four external 1 μF capacitors are required for the internal
voltage converter.
CIRCUIT DESCRIPTIONThe internal circuitry consists of three main sections. These
are:A charge pump voltage converter3V Logic to EIA-232 transmittersEIA-232 to 3V Logic receivers.
Charge Pump DC-DC Voltage ConverterThe Charge Pump Voltage converter consists of an oscillator
and a switching matrix. The converter generates a ±6.6 V sup-
ply from the input +3.3 V level. This is done in two stages using
a switched capacitor technique as illustrated below. First, the
3.3V input supply is doubled to 6.6 V using capacitor C1 as the
charge storage element. The 6.6 V level is then inverted to gen-
erate –6.6 V using C2 as the storage element.
Capacitors C3 and C4 are used to reduce the output ripple.
Their values are not critical and can be reduced if higher levels
of ripple are acceptable. The charge pump capacitors C1 and
C2 may also be reduced at the expense of higher output imped-
ance on the V+ and V– supplies.
The V+ and V– supplies may also be used to power external
circuitry if the current requirements are small.
Transmitter (Driver) SectionThe Drivers convert 3V or 5V logic input levels into EIA-232
output levels. With VCC = +3.3V and driving an EIA-232 load,
the output voltage swing is typically ±5.5 V.
Unused inputs may be left unconnected, as an internal 400 kΩ
pull-up resistor pulls them high forcing the outputs into a low
state. The input pull-up resistors typically source 8 μA when
grounded so unused inputs should either be connected to VCC
or left unconnected in order to minimize power consumption.
Receiver SectionThe receivers are inverting level shifters which accept EIA-232
input levels and translate them into 3 V logic output levels.
The inputs have internal 5 kΩ pull-down resistors to ground
and are also protected against overvoltages of up to ±25 V. The
guaranteed switching thresholds are 0.4 V minimum and 2.4 V
maximum. Unconnected inputs are pulled to 0 V by the internal
5 kΩ pull-down resistor. This, therefore, results in a Logic 1
output level for unconnected inputs or for inputs connected to
GND.
The receivers have schmitt trigger input with a hysteresis level
of 0.3 V. This ensures error-free reception for both noisy inputs
and for inputs with slow transition times.
ENABLE AND SHUTDOWNTable I shows the truth table for the enable and shutdown con-
trol signals. When disabled, all receivers are placed in a high
impedance state. In shutdown, all transmitters are disabled and
all receivers on the ADM561 are disabled. On the ADM560,
receivers R4 and R5 remain enabled in shutdown.
Typical Performance Curves
LOAD CAPACITANCE – pF
– Volts Figure 3.Transmitter Output Voltage High vs. Load
Capacitance
| IOUT | – mA
| T
OUT
| – VoltsFigure 4.Transmitter Output Voltage vs. Load Current
VCC – Volts
– VoltsFigure 5.Transmitter Output Voltage High vs. VCC
Figure 6.Transmitter Output Voltage Low vs. Load
Capacitance
LOAD CAPACITANCE – pF
SLEW RATE – V/µsFigure 7.Transmitter Slew Rate vs. Load Capacitance
VCC – Volts
– Volts
ADM560/ADM561
OUTLINE DIMENSIONSDimensions shown in inches and (mm).
28-Lead SO
(R-28)
CURRENT – mA
OUTPUT VOLTAGE V+, V– – VoltsFigure 9.V+, V– vs. Load Current
