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ADM489A
5 V, Slew-Rate Limited, Low Power, 250 kbps, Full Duplex EIA RS-485 Transceiver
ANALOG
DEVICES
FulI-Duplex, Low Power,
Slew Rate Limited, EIA RS-485 Transceivers
ADM488A/ADM489A
FEATURES
Complies with ANSITlA/ElA-485-A-1998 and
ISO 8482: 1987(E)
250 kbps data rate
Single 5 V t 10% supply
-7 V to +12 V bus common-mode range
Connect up to 32 nodes on the bus
Reduced slew rate for low EM interference
Short-circuit protection
30 "A supply current
APPLICATIONS
Low power RS-485 and RS-422 systems
DTE-DCE interface
Packet switching
Local area networks
Data concentration
Data multiplexers
Integrated services digital network (ISDN)
GENERAL DESCRIPTION
The ADM488A and ADM489A are low power, differential line
transceivers suitable for communication on multipoint bus
transmission lines. They are intended for balanced data
transmission and comply with both RS-485 and RS-422
standards of the Electronics Industries Association (EIA). Both
products contain a single differential line driver and a single
differential line receiver, making them suitable for full-duplex
data transfer. The ADM489A contains an additional receiver
and driver enable control.
The input impedance is 12 kn, allowing 32 transceivers to be
connected on the bus. The ADM488A/ADM489A operate from
a single 5 V i 10% power supply.
Rev. A
Inhmnathm furnished by Analog Devices is believed to be actuate and reliable. However, no
responsibility is assumed byAnalog Devicesfor its use, norforany infringements of patents or other
rightsofthird partiesthat may result from itsuse. Spetifitathms subjecttodiange without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarRs are the property of their respeetheovmees
FUNCTIONAL BLOCK DIAGRAMS
ADM488A
03498430 I
Figure 2. ADM489A
Excessive power dissipation that is caused by bus contention or
output shorting is prevented by a thermal shutdown circuit. This
feature forces the driver output into a high impedance state if,
during fault conditions, a significant temperature increase is
detected in the internal driver circuitry.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The ADM488A/ADM489A are fabricated on BiCMOS, an
advanced mixed technology process combining low power
CMOS with fast switching bipolar technology.
The ADM488A/ADM489A are fully specified over the industrial
temperature range and are available in SOIC and MSOP packages.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.31 1 3 ©2009-2010 Analog Devices, Inc. All rights reserved.
h0lM88Mr0lM88h
TABLE OF CONTENTS
Features _............................................................................................. 1
Applications ....................................................................................... 1
General Description _........................................................................ 1
Functional Block Diagrams B............................................................ 1
Revision History _.............................................................................. 2
Specifications W.................................................................................... 3
Timing Specifications m................................................................. 4
Absolute Maximum Ratings w........................................................... 5
ESD Caution .................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
REVISION HISTORY
1 I/IO-Rev. 0 to Rev. A
Changes to Table 2 ........
Changes to Figure 20 _..................................................................... ll
Changes to Figure 21 _..................................................................... 12
Added New Figure 23, Renumbered Subsequent Figures,
Moved Old Figure 23 to New Figure 25 ...................................... 14
Changes to Ordering Guide W......................................................... 15
10/ 09-Revision 0: Initial Version
Typical Performance Characteristics _............................................. 8
Test Circuits w....................................................................................... 9
Switching Characteristics K......................................................... 10
Theory of Operation w..................................................................... 11
Applications Information .............................................................. 13
Differential Data Transmission ...... .. 13
Cable and Data Rate _.................................................................. 13
Outline Dimensions _...................................................................... 14
Ordering Guide w......................................................................... 15
Rev.A l Page2 of16
ADM488A/ADM489A
SPECIFICATIONS
Vac: = 5 V i 10%; all specifications TMIN to TMAx, unless otherwise noted.
Table 1.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DRIVER
Differential Output Voltage V00 5.0 V R = co, see Figure 11
2.0 5.0 V Vcc = 5 V, R = 50 n (RS-422), see Figure 11
1.5 5.0 V R = 27 ft (RS-485), see Figure 11
1.5 5.0 V VTsT=-7Vto+12V,seeFigure12,Vcc=5Vt5%
A|Voo| for Complementary Output States 0.2 V R = 27 fl or 50 o, see Figure 11
Common-Mode Output Voltage Voc 3.0 V R = 27 fl or 50 o, see Figure 11
AlVocl for Complementary Output States 0.2 V R = 27 fl or 50 0
Output Short-Circuit Current
VouT 250 mA -7VSVos+12V
CMOS Input LogicThreshold Low VINL 1.4 0.8 V
CMOS Input LogicThreshold High VINH 2.0 1.4 V
Logic Input Current (DE, DI) t1.0 PA
RECEIVER
Differential InputThreshold Voltage VTH -0.2 +0.2 V -7 V s: VCM S +12 V
Input Voltage Hysteresis AVTH 70 mV VCM = 0V
Input Resistance 12 k0 -7Vs:VcMs+12V
Input Current (A, B) 1 mA VIN = 12 V
-0.8 mA VIN = -7 V
Logic Enable Input Current (E) atcl pA
CMOS Output Voltage Low VOL 0.4 V low = +4.0 mA
CMOS Output Voltage High VoH 4.0 V low = -4.0 mA
Short-Circuit Output Current 7 85 mA Vour = GND or Vcc
Three-State Output Leakage Current :1.0 pA 0.4V s: Vour 5 2.4V
POWER SUPPLY CURRENT lcc Outputs unloaded, receivers enabled
30 60 PA DE = 0V (disabled)
37 74 11A DE = 5 V (enabled)
Rev. A l Page 3 of 16
h0lM88Mr0lM88h
TIMING SPECIFICATIONS
Vcc = 5 V i 10%. All specifications TMIN to TMAx, unless otherwise noted.
Table 2.
Parameter Symbol Min Typ Max Unit Test Conditions/Comments
DRIVER
Propagation Delay Input to Output tPLH, tPHL 250 2000 ns RL differential = 54 n, Cu = CLZ = 100 pF, see
Figure 15, Figure 16
Driver Output Skew tSKEW 100 800 ns RL differential = 54 n, Cu = ' = 100 pF, see
Figure 15
Driver Rise/Fall Time trm, tor 250 2000 ns RL differential = 54 n, Cu = ' = 100 pF, see
Figure 15, Figure 16
Driver Enable to Output Valid tZL, tzu 250 2000 ns RL = 500 n, C = 100 pF, see Figure 12, Figure 18
Driver Disable Timing m, tra 300 3000 ns RL = 500 fl, C = 15 pF, see Figure12,Figure 18
Maximum Data Rate 250 kbps
RECEIVER
Propagation Delay Input to Output tpLH, tPHL 250 2000 ns CL = 15 pF, see Figure 15, Figure 17
Skew ItPLH - tPHLI 100 ns
Receiver Enable km 10 50 ns RL =1 KO, CL = 15 pF, see Figure 14, Figure 19
Receiver Disable tsm 10 50 ns RL = 1 KO, CL = 15 pF, see Figure 14, Figure 19
Maximum Data Rate 250 kbps
Rev.A l Page4of16
ADM488A/ADM489A
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
Vcc 7 V
Inputs
Driver Input (DI) -0.3 V to Vcc + 0.3 V
Control Inputs (DE, E) -0.3 V to Vcc + 0.3 V
Receiver Inputs (A, B) -14Vto +14V
Outputs
Driver Outputs -14Vto+12.5V
Receiver Output -0.5 V to Vcc + 0.5 V
Power Dissipation 8-Lead SOIC 520 mW
61A, Thermal Impedance 110°C/W
Power Dissipation 14-Lead SOIC 800 mW
6JA,Thermal Impedance 120°C/W
Operating Temperature Range
Industrial (A Version) -40oC to +85°C
Storage Temperature Range -65''C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device.
Charged devices and circuit boards can discharge
A without detection. Although this product features
patented or proprietary protection circuitry, damage
ftsgy may occur on devices subjected to high energy ESD.
Therefore, proper ESD precautions should be taken to
avoid performance degradation or loss of functionality.
Rev. A l Page 5 of 16
h0lM88Mr0lM88h
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Vcc E a A
RO IT ADM488A B
TOP VIEW
DI IE (Not to Scale) El Z
GND IE 5 Y
Figure 3. ADM488A SOIC_N and MSOP Pin Configuration
Table 4. ADM488A Pin Function Descriptions
Pin No. Mnemonic Description
1 Vcc Power Supply, 5 V i 10%.
2 RO Receiver Output. When A > B by 200 mV, RO = high. lfA < B by 200 mV, RO = low.
3 DI Driver Input. A logic low on DI forces Y low and Z high, whereas a logic high on DI forces Y high and Z low.
4 GND Ground Connection, 0V.
5 Y Noninverting Driver, Differential Output Y.
6 Z Inverting Driver, Differential Output Z.
7 B Inverting Receiver, Input B.
8 A Noninverting Receiver, Input A.
Rev.A l Page60f16
ADM488A/ADM489A
NC E E Vcc
RO E E NC -
E E ADM489A E A ADM489A
TOP VIEW TOP VIEW
DE E (None Scale) E B (Notto Scale)
DI E E z m
GND E El Y iij'
GND El NC E Cl
NC = NO CONNECT 'i'
Figure 4. ADM489A SOIC_N Pin Configuration Figure 5. ADM489A MSOP Pin Configuration
Table 5. ADM489A Pin Function Descriptions
Pin No.
SOIC_N MSOP Mnemonic Description
1, 8,13 N/A1 NC No Connect. No connections are required to this pin.
2 1 RO Receiver Output. When enabled, ifA > B by 200 mV, RO = high. lfA < B by 200 mV, RO = low.
3 2 E Receiver Output Enable. A low level enables the receiver output, RO. A high level places the
ADM489A in a high impedance state.
4 3 DE Driver Output Enable. A high level enables the driver differential outputs (Y and Z). A low level
places the ADM489A in a high impedance state.
5 4 DI Driver Input. When the driver is enabled, a logic low on DI forces Y low and Z high, whereas a
logic high on DI forcesY high and Z low.
6, 7 5 GND Ground Connection, 0 V.
9 6 Y Noninverting Driver, Differential Output Y.
10 7 Z Inverting Driver, Differential Output Z.
11 8 B Inverting Receiver, Input B.
12 9 A Noninverting Receiver, Input A.
14 10 Vcc Power Supply, 5 V i 10%.
l N/A means not applicable.
Rev. A l Page 7 of 16
