ADM483AR ,5 V Low Power, Slew-Rate Limited RS-485/RS-422 TransceiverGENERAL DESCRIPTION The ADM483 is a low power differential line transceiver suitable The receiver c ..
ADM483AR ,5 V Low Power, Slew-Rate Limited RS-485/RS-422 TransceiverFEATURES FUNCTIONAL BLOCK DIAGRAM VEIA RS-485/RS-422-compliant CCData rates up to 250 kbps ADM483Sl ..
ADM483EAN ,+-15 kV ESD Protected, EMC Compliant Slew Rate Limited, EIA RS-485 Transceiverspecifications T to T unless otherwise noted)CC MIN MAXParameter Min Typ Max Units Test Conditions/ ..
ADM483EAR ,+-15 kV ESD Protected, EMC Compliant Slew Rate Limited, EIA RS-485 Transceiverspecifications T to T unless otherwise noted.)CC MIN MAXParameter Min Typ Max Units Test Conditions ..
ADM483EAR-REEL , ±15 kV ESD Protected, Slew Rate Limited, 5 V, RS-485 Transceiver
ADM483EARZ-REEL , ±15 kV ESD Protected, Slew Rate Limited, 5 V, RS-485 Transceiver
AIC1526-0CN , Dual USB High-Side Power Switch
AIC1526-0CS , Dual USB High-Side Power Switch
AIC1526-0CS , Dual USB High-Side Power Switch
AIC1526-1CN , Dual USB High-Side Power Switch
AIC1526-1CN , Dual USB High-Side Power Switch
AIC1527-0CS , Quad USB High-Side Power Switch
ADM483AR
5 V Low Power, Slew-Rate Limited RS-485/RS-422 Transceiver
5 V Low Power, Slew-Rate Limited
RS-485/RS-422 Transceiver
Rev. 0
FEATURES
EIA RS-485/RS-422-compliant
Data rates up to 250 kbps
Slew-rate limited for low EMI
100 nA supply current in shutdown mode
Low power consumption (120 µA)
Up to 32 transceivers on one bus
Outputs high-z when disabled or powered off
–7 V to +12 V bus common-mode range
Thermal shutdown and short-circuit protection
Pin-compatible with MAX483
Specified over –40°C to +85°C temperature range
Available in 8-lead SOIC package
APPLICATIONS
Low power RS-485 applications
EMI sensitive systems
DTE-DCE interfaces
Industrial control
Packet switching
Local area networks
Level translators
FUNCTIONAL BLOCK DIAGRAM GND
VCC
Figure 1.
GENERAL DESCRIPTION The ADM483 is a low power differential line transceiver suitable
for half-duplex data communication on multipoint bus trans-
mission lines. It is designed for balanced data transmission, and
complies with EIA Standards RS-485 and RS-422.The part
contains a differential line driver and a differential line receiver.
Both share the same differential pins, with either the driver or
the receiver being enabled at any given time.
The device has an input impedance of 12 kΩ, allowing up to
32 transceivers on one bus. Since only one driver should be
enabled at any time, the output of a disabled or powered-down
driver is three-stated to avoid overloading the bus. This high
impedance driver output is maintained over the entire
common-mode voltage range from –7 V to +12 V.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The driver outputs are slew-rate limited to reduce EMI and data
errors caused by reflections from improperly terminated buses.
Excessive power dissipation caused by bus contention or by
output shorting is prevented by a thermal shutdown circuit.
The part is fully specified over the industrial temperature range,
and is available in an 8-lead SOIC package.
TABLE OF CONTENTS Specifications.....................................................................................3
Timing Specifications.......................................................................4
Absolute Maximum Ratings............................................................5
ESD Caution..................................................................................5
Pin Configuration and Function Descriptions.............................6
Test Circuits.......................................................................................7
Switching Characteristics................................................................8
Typical Performance Characteristics.............................................9
Applications.....................................................................................11
Differential Data Transmission................................................11
Cable and Data Rate...................................................................11
Thermal Shutdown....................................................................12
Receiver Open-Circuit Fail-Safe...............................................12
Outline Dimensions.......................................................................13
Ordering Guide..........................................................................13
REVISION HISTORY
10/04—Revision 0: Initial Version
SPECIFICATIONS VCC = 5 V ± 5%, TA = TMIN to TMAX, unless otherwise noted.
Table 1. TIMING SPECIFICATIONS VCC = 5 V ± 5%, TA = TMIN to TMAX, unless otherwise noted.
Table 2. The device is put into shutdown mode by driving RE high and DE low. If these inputs are in this state for less than 50 ns, the device is guaranteed not to enter
shutdown mode. If the enable inputs are in this state for at least 3000 ns, the device is guaranteed to have entered shutdown mode.
ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted.
Table 3. Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VCC
GND05079-002
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions TEST CIRCUITS 05079-003
Figure 3. Driver Voltage Measurement
375Ω
375Ω
Figure 4. Driver Voltage Measurement over Common-Mode Voltage Range
05079-005
Figure 5. Driver Propagation Delay
VCC
VOUT
DE IN
0V OR 3VS1
Figure 6. Driver Enable/Disable
VOUT
Figure 7. Receiver Propagation Delay
VCC
+1.5V
–1.5V
RE IN
Figure 8. Receiver Enable/Disable
SWITCHING CHARACTERISTICS tSKEW =|tPLH–tPHL|
Figure 9. Driver Propagation Delay, Rise/Fall Timing
05079-010
A, B
VOL Figure 10. Receiver Propagation Delay
A, B
A, B
VOH
VOL
VOH–0.5V
Figure 11. Driver Enable/Disable Timing
VOH
VOL
VOH–0.5V
Figure 12. Receiver Enable/Disable Timing
